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US 7,443,330 B2Granted
Method of 1-bit hysteretic control in N-bit A/D conversion
AssigneeMonolithic Power Systems, Inc.
InventorsKaiwei Yao, Zhou Lu
Life of this patent
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Abstract
The present invention introduces methods to eliminate 1-bit jitter problem in the N-bit A/D conversion applications. The methods do not require any increase in the total bit of A/D conversion.
Claims11
A method for translating an analog signal to a digital signal, comprising:
- sampling said analog signal from an input terminal;
- converting said analog signal to an N-bit digital signal;
- comparing said N-bit digital signal with a previously selected N-bit digital signal, and recording “X” in said 1-bit storage unit when said N-bit digital signal is larger than said previously selected N-bit digital signal, recording “Y” in said 1-bit storage unit when said N-bit digital signal is less than or equal to said previously selected N-bit digital signal, wherein “X” and “Y” are digital numbers;
- and
- selecting said previously selected N-bit digital signal if said N-bit digital signal is 1-bit smaller than said previously selected N-bit digital signal and said 1-bit storage unit contains “X”, and selecting said N-bit digital signal in all other cases.
2 more elements
A method for translating an analog signal to a digital signal, comprising:
- sampling said analog signal from an input terminal;
- converting said analog signal to an N-bit digital signal;
- comparing said N-bit digital signal with a previously selected N-bit digital signal, and recording “X” in said 1-bit storage unit when said N-bit digital signal is larger than said previously selected N-bit digital signal, recording “Y” in said 1-bit storage unit when said N-bit digital signal is less than or equal to said previously selected N-bit digital signal;
- and
- selecting said previously selected N-bit digital signal if said N-bit digital signal is 1-bit larger than said previously selected N-bit digital signal and said 1-bit storage unit has “Y”, and selecting said N-bit digital signal in all other cases.
2 more elements
A method for translating an analog signal to a digital signal, comprising:
- sampling said analog signal from an input terminal;
- converting said analog signal to an N-bit digital signal;
- comparing the sum of the last K N-bit digital signals sampled and converted from said analog signal with a second digital signal that is stored in a M-bit storage unit, wherein M is greater than or equal to (N+log2K);
- deriving the difference between said sum of the last K N-bit digital signals and said second digital signal stored in said M-bit storage unit;
- recording said sum in said M-bit storage unit if said difference is larger than a predetermined value, and keeping said second digital signal in said M-bit storage unit if said difference is smaller than or equal to the predetermined value;
- dividing the digital data stored in said M-bit storage unit by K and deriving a new N-bit digital signal;
- and
- selecting said new N-bit digital signal.
5 more elements
An analog-to-digital conversion apparatus, comprising:
- 2N 1-bit analog-to-digital conversion stages operable to convert an analog signal into an N-bit signal;
- and
- an arithmetic logic unit (ALU) further comprising a one-bit storage unit, electrically coupled to said 2N 1-bit analog-to-digital conversion stages. said ALU operable to perform the following functions:
- comparing said N-bit digital signal with a previously selected N-bit digital signal and recording an “X” in said one-bit storage unit when said N-bit digital signal is greater than said previously selected N-bit digital signal.
- recording a “Y” in said one-bit storage unit when said N-bit digital signal is less than or equal to said previously selected N-bit digital signal, wherein “X” and “Y” are digital numbers,
- selecting said previously selected N-bit digital signal if said N-bit digital signal is one-bit smaller than said previously selected N-bit digital signal and said one-bit storage unit contains “X”, and
- selecting said N-bit digital signal in all other cases.
4 more elements
An analog-to-digital conversion apparatus, comprising:
- 2N 1-bit analog-to-digital conversion stages;
- an arithmetic logic unit (ALU) further comprising an M-bit storage unit wherein M is larger than or equal to (N+log2K), wherein said ALU is operable to perform the following functions:
- comparing the sum of the last K N-bit digital signals sampled and converted from said analog signal with a second digital signal that is stored in a M-bit storage unit, wherein M is greater than or equal to (N+log2K);
- deriving the difference between said sum of the last K N-bit digital signals and said second digital signal stored in said M-bit storage unit;
- recording said sum in said M-bit storage unit if said difference is larger than a predetermined value, and keeping said second digital signal in said M-bit storage unit if said difference is less than or equal to the predetermined value;
- dividing the digital data stored in said M-bit storage unit by K and deriving a new N-bit digital signal;
- and
- selecting said new N-bit digital signal.
5 more elements
Dependencies are inferred from the claim text.