Back to results
US 7,442,995 B2Granted
Semiconductor device and method of manufacturing the same
AssigneeFujitsu Limited
InventorRyo Tanabe
Life of this patent
Estimating the term…
Abstract
Each of channel regions 2a and 3b is covered by a gate electrode 6 via a gate insulation film 5 and side wall spacers 9 from its top face to both side faces along an x-direction. In other words, there is no insulation material of an STI element isolation structure 4 on both side faces along the x-direction of each of the channel regions 2b and 3b (in a non-contact state), thereby preventing stress in a z-direction from being applied by the STI element isolation structure 4 to each of the channel region 2b and 2b.
Claims6
A semiconductor device, comprising:
- an element isolation structure formed by embedding an insulation material in a groove formed within an element isolation region of a semiconductor substrate;
- an active region defined in the semiconductor substrate by said element isolation structure;
- a gate electrode pattern-formed above said active region via a gate insulation film;
- and
- a transistor structure having a pair of impurity diffused layers formed within said active region on both sides of said gate electrode,
- wherein surface layers of said active region are formed so as to protrude said element isolation structure, and said surface layers have a channel region constituting a substantial current passing region formed between each impurity diffused layer, and
- wherein said element isolation structure is in a non-contact state with at least both side faces along a gate-length direction of a channel region within said surface layers.
4 more elements
Dependencies are inferred from the claim text.