Semiconductor device having a recess channel and method for fabricating the same
AssigneeHynix Semiconductor Inc.
InventorByung Soo Eun
Life of this patent
Estimating the term…
Abstract
Provided is a semiconductor device having recess channel, comprising a semiconductor substrate having first and second trenches disposed to cross each other on both sides of an active region among adjoining regions between an active region and element-isolation films; a gate insulation film disposed on the semiconductor substrate of the active region; a first gate line disposed on the gate insulation film, and crossing the active region and overlapping with the first trench; and a second gate line disposed on the gate insulation film, and crossing the active region while overlapping with the second trench.
Claims3
A semiconductor device having a recess channel, comprising:
- a semiconductor substrate having an isolation region and an active region defined by the isolation region;
- a first trench disposed on the semiconductor substrate, the first trench extending partially across the active region and across a first edge of the active region, thereby overlapping a portion of the active region and a portion of the isolation region;
- a second trench disposed on the semiconductor substrate, the second trench extending partially across the active region and across a second edge of the active region, thereby overlapping a portion of the active region and a portion of the isolation region;
- a gate insulation film disposed on the semiconductor substrate of the active region, including the first and second trenches;
- a first gate line disposed on the gate insulation film, the first gate line extending across the active region and fully filling the first trench;
- and
- a second gate line disposed on the gate insulation film, the second gate line extending across the active region and fully filling the second trench;
- wherein:
- the second edge is located on an opposite side of the active region relative to the first edge;
- and
- the first and second gate lines are spaced from each other.
Dependencies are inferred from the claim text.