Inter-metal dielectric of semiconductor device and manufacturing method thereof including plasma treating a plasma enhanced fluorosilicate glass
AssigneeDongbu Electronics Co., Ltd.
InventorTae-Young Lee
Life of this patent
Estimating the term…
Loading patent…
AssigneeDongbu Electronics Co., Ltd.
InventorTae-Young Lee
Estimating the term…
An exemplary manufacturing method of an inter-metal dielectric of a semiconductor device according to an embodiment of the present invention includes forming a first silicon-rich oxide (SRO) layer on a silicon substrate provided with or otherwise having a copper line layer therein, forming a plasma enhanced fluorosilicate glass (PEFSG) layer on the first SRO layer, plasma-treating the PEFSG layer, and forming a second SRO layer on the plasma-treated PEFSG layer. According to the present invention, the thickness of the second SRO layer of the inter-metal dielectric can be reduced. Consequently, process cost can be reduced, and the total thickness of the inter-metal dielectric can be reduced so as to lower the dielectric constant thereof, reduce the aspect ratio of any via holes that are subsequently formed in the inter-metal dielectric, and potentially increase the yield as a result of the reduced via hole aspect ratio.
A method of manufacturing a dielectric layer in a semiconductor device, comprising:
A dielectric layer in a semiconductor device, comprising;
Dependencies are inferred from the claim text.