Method for processing IC designs for different metal BEOL processes

A method for converting a backend design of an IC from one metal process to another metal process, the method comprising:

• determining layer constructions of an original design of the IC for a first metal backend process;
• based on the layer constructions of the original design of the IC, constructing primitive layer constructions of a target design of the IC for a second metal backend process;
• scaling metal thicknesses of the target design to match associated metal resistances of the target design with corresponding metal resistances of the original design;
• tuning an effective dielectric constant of a dielectric layer of the target design to match an associated capacitance of the target design with a corresponding capacitance of the original design;
• and
• generating final layout of the target design.

A process for using Cu BEOL to fabricate an integrated circuit (IC) originally having an Al backend design, the process comprising:

• receiving an Al backend design of the IC;
• determining layer constructions of the Al backend design;
• constructing primitive layer constructions of a Cu backend design of the IC according to the layer constructions of the Al backend design;
• scaling metal thicknesses of a target design to match associated metal resistances of the Cu backend design with corresponding metal resistances of the Al backend design;
• tuning an effective dielectric constant of a dielectric layer of the Cu backend design to match an associated capacitance of the Cu backend with a corresponding capacitance of the Al backend design, wherein tuning the effective dielectric constant of the dielectric layer comprises adjusting a thickness of the dielectric layer or inserting a compensation dielectric layer having a calculated thickness;
• verifying the Cu backend design with a layout rule check tool to identify a violation;
• fixing the violation identified if there is any;
• generating final layout of the Cu backend design;
• and
• fabricating the IC based on the Cu backend design using Cu BEOL fabrication process.