Method to engineer etch profiles in Si substrate for advanced semiconductor devices

A method of fabricating a semiconductor device comprising:

• providing a substrate;
• etching an upper portion of a trench in the substrate, wherein a passivation layer is formed on sidewalls of upper portion of the trench during etching;
• etching a lower portion of the trench while the passivation layer protects the upper portion, the lower portion comprises a rounded lower portion with a width greater than the upper portion;
• wherein the upper and lower portions form an inverted keyhole trench;
• and
• at least partially filling the inverted keyhole shaped trench with a material to create stress on the sidewalls of the inverted keyhole shaped trench to form a stress region.

A method for forming stressor regions comprising:

• providing a substrate prepared with isolation regions defining an active region and a gate structure on the substrate in the active region;
• forming trenches in source/drain regions adjacent to the isolation regions and the gate structure, wherein forming the trenches comprises
• etching upper portions of the trenches in the source/drain regions of the substrate, wherein passivation layers are formed on sidewalls of the upper portions of the trenches during etching, and
• etching lower portions of the trenches to form rounded lower portions with widths greater than the upper portions, the passivation layers protecting the upper portions during etching to form the lower portions;
• and
• filling the trenches with a stress material to form stressor regions, wherein the stressor regions create stress in the substrate under the gate structure.