Methods to achieve precision alignment for wafer scale packages
AssigneeInternational Business Machines Corporation
InventorsHoward Hao Chen, Louis L. Hsu
Life of this patent
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Abstract
Methods for manufacturing an integrated wafer scale package that reduces a potential misalignment between a chip and a pocket of a carrier substrate. According to one aspect of the present invention, a method for manufacturing a semiconductor device includes a photoresist layer disposed on a carrier substrate, a chip placed onto a surface of the photoresist layer. The photoresist layer is patterned using the chip as a mask. The chip is removed from the photoresist layer after the patterning step. A pocket is formed in the carrier substrate, and the chip that was removed is placed into the pocket formed in the carrier substrate.
Claims30
A method for fabricating a semiconductor device, comprising:
- depositing a photoresist layer on a carrier substrate;
- placing a chip onto a surface of the photoresist layer;
- exposing and baking the photoresist layer using the chip as a mask;
- removing the chip from the photoresist layer;
- forming a pocket in the carrier substrate by removing an unexposed portion of the photoresist layer;
- and placing the chip into the pocket formed in the carrier substrate.
A method of manufacturing a semiconductor device, comprising:
- attaching a wafer to STI regions in a carrier substrate such that a void is formed between the STI regions and between the wafer and the carrier substrate;
- coating the wafer with a photoresist layer;
- placing a chip on the photoresist layer in an area above the void;
- exposing and baking the photoresist layer using the chip as a mask;
- removing the chip;
- forming a pocket in the wafer above the carrier substrate by removing an unexposed portion of the photoresist layer;
- and placing the chip into the pocket.
A method for fabricating a semiconductor device, comprising:
- depositing a photoresist layer on a carrier substrate;
- aligning each of a plurality of chips with a predetermined location on the carrier substrate;
- placing the plurality of chips onto a surface of the photoresist layer;
- and exposing and baking the photoresist layer using the plurality of chips as a mask.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform a method for fabricating a semiconductor device, the method steps comprising:
- depositing a photoresist layer on a carrier substrate;
- aligning each of a plurality of chips with a predetermined location on the carrier substrate;
- placing the plurality of chips onto a surface of the photoresist layer;
- and exposing and baking the photoresist layer using the plurality of chips as a mask.
Dependencies are inferred from the claim text.