Generic ink jet head fire logic

An inkjet firing architecture for use in association with a device utilizing an ink jet head, the architecture comprising:

• a fire synchronization block comprising an N-entry delay line operable to simultaneously delay multiple incoming external events for varying periods of time prior to passing each of the events to one of M event sub-dividing stages and to provide a fire synchronization block output that is related at least in part to the delayed incoming external events, wherein each of the M event sub-dividing stages emits a programmable series of sub-events, each of the sub-events being separated in time by a sub-event interval;
• at least one vector sequencing block operable to receive the fire synchronization block output and to provide at least one of a control signal for the ink jet head and data related to selected nozzles to be fired as a vector sequencing block output;
• and
• a vector compositing block to form a composite output vector by combining output from the at least one vector sequencing block, and to provide the composite output vector to the ink jet head;
• wherein each programmable series of sub-events ends with an independent Mth level sub-event that is passed along as the fire synchronization block output to the at least one vector sequencing block.