Enhancement-depletion Darlington device
AssigneeRF Micro Devices, Inc.
InventorKevin W. Kobayashi
Life of this patent
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Abstract
An apparatus comprising a Darlington transistor pair comprising a first transistor and a second transistor. The first transistor may have a gate configured to receive an input signal. The second transistor may have a gate coupled to a source of the first transistor. The Darlington transistor pair may be configured to generate an output signal at a drain of the first transistor and a drain of the second transistor in response to the input signal. The first transistor may be implemented as an enhancement mode device and the second transistor may be implemented as a depletion mode device.
Claims19
An apparatus comprising:
- a Darlington transistor pair comprising (a) a first transistor having a gate configured to receive an input signal, (b) a second transistor having a gate coupled to a source of said first transistor and (c) an inductor element coupled to said source of said first transistor, wherein (i) said Darlington transistor pair is configured to generate an output signal at a drain of said first transistor and a drain of said second transistor in response to said input signal and (ii) said first transistor comprises an enhancement mode device and said second transistor comprises a depletion mode device.
An apparatus comprising:
- a Darlington transistor pair comprising a first transistor having a gate configured to receive an input signal and a second transistor having a gate coupled to a source of said first transistor, wherein (i) said Darlington transistor pair is configured to generate an output signal at a drain of said first transistor and a drain of said second transistor in response to said input signal, (ii) said first transistor comprises an enhancement mode device and said second transistor comprises a depletion mode device, (iii) said first transistor is AC coupled to said second transistor through a first capacitor and (iv) a first inductor is coupled between the source of the first transistor and ground.
An apparatus comprising:
- a Darlington transistor pair comprising (a) a first transistor having a gate configured to receive an input signal, (b) a second transistor having a gate coupled to a source of said first transistor and (c) a spiral inductor connected to said source of said first transistor to provide a high RF impedance and a low DC impedance, wherein (i) said Darlington transistor pair is configured to generate an output signal at a drain of said first transistor and a drain of said second transistor in response to said input signal and (ii) said first transistor comprises an enhancement mode device and said second transistor comprises a depletion mode device.
Dependencies are inferred from the claim text.