Logical operation circuit and logical operation device
AssigneeRohm Co., Ltd.
InventorYoshikazu Fujimori
Life of this patent
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Abstract
To provide a logical operation circuit and a logical operation device which can performs a logical operation using a ferroelectric capacitor. The area ratio between the ferroelectric capacitors CF1 and CF2 are set such that the potential difference Vdef between voltages Va1 and Va0 is as large as possible, and a transistor MP has a threshold voltage Vth which is about ½·(Va0+Va1). Thus, the ON/OFF operation margin of the transistor MP can be significantly large. As a result, a reading process can be performed at a high speed without using an amplifying circuit such as a sense amplifier. Also, the logical operation circuit and the logical operation device can be highly integrated with ease since no sense amplifier is used.
Claims27
A logical operation circuit comprising:
- a first ferroelectric capacitor which can retain a polarization state corresponding to a specified logical operator and which has first and second terminals;
- first and second signal lines which can provide first and second operation target data to the first and second terminals, respectively, of the first ferroelectric capacitor retaining the polarization state corresponding to the specified logical operator and which are connected to the first and second terminals, respectively;
- and
- an operation result output section which, when a residual polarization state of the first ferroelectric capacitor determined by the provision of the two operation target data is either a first residual polarization state or a second residual polarization state having a polarization direction opposite that of the first residual polarization state, outputs the result of a logical operation performed on the first and second operation target data according to the logical operator based on the residual polarization state of the first ferroelectric capacitor, which has a second ferroelectric capacitor having a third terminal connected to the first signal line and a fourth terminal connected to a first reference potential, and which, when outputting the logical operation result, connects the first and second signal lines to the first reference potential and releases the connection, then connects the second signal line to a second reference potential, and outputs the logical operation result based on a potential generated in the first signal line when the second signal line is connected to the second reference potential,
- wherein the area ratio Ra of the area of the second ferroelectric capacitor to the area of the first ferroelectric capacitor satisfies the following relation:
- 1/(1+C0/C1·Ra)−1/(1+Ra) ≧0.75·(1/(1+√(C0/C1))−1/(1+√(C1/C0)))
- wherein
- C0:
- the first ferroelectric capacitor's average capacitance at the time of non-inversion, and
- C1:
- the first ferroelectric capacitor's average capacitance at the time of inversion.
A logical operation circuit comprising:
- a first ferroelectric capacitor which retains a residual polarization state corresponding to a specified logical operator and which has first and second terminals;
- and
- an operation result output section which, based on a polarization state of the first ferroelectric capacitor obtained by providing first and second operation target binary data y1 and y2 to first and second terminals, respectively, of the first ferroelectric capacitor, outputs the result of a logical operation performed on the first and second operation target data y1 and y2 according to the logical operator as operation result binary data “z”, which has a second ferroelectric capacitor having a third terminal connected to the first terminal and a fourth terminal connected to a first reference potential, and which, when outputting the logical operation result, connects the first to third terminals to the first reference potential and releases the connection, then connects the second terminal to a second reference potential, and outputs the logical operation result based on a potential generated in the first and third terminals when the second terminal is connected to the second reference potential,
- wherein the area ratio Ra of the area of the second ferroelectric capacitor to the area of the first ferroelectric capacitor satisfies the following relation:
- 1/(1+C0/C1·Ra)−1/(1+Ra) ≧0.75·(1/(1+√(C0/C1))−1/(1+√(C1/C0)))
- wherein
- C0:
- the first ferroelectric capacitor's average capacitance at the time of non-inversion, and
- C1:
- the first ferroelectric capacitor's average capacitance at the time of inversion, and
- wherein, when the residual polarization state of the first ferroelectric capacitor corresponding to the specified logical operator is represented by state binary data “s”, the operation result data “z” substantially satisfies the following relation:
- z=/s AND y1 NAND /y2 OR s AND (y1 NOR /y2).
A logical operation circuit comprising:
- a first ferroelectric capacitor having first and second terminals;
- and
- a second ferroelectric capacitor having a third terminal connected to the first terminal and a fourth terminal connected to a first reference potential,
- wherein the first and second ferroelectric capacitors are precharged to the first reference potential and then the fourth and second terminals are connected to the first reference potential and a second reference potential, respectively, so that a logical operation result corresponding to the history of the voltage applied to the first and second terminals before the precharging can be outputted based on a potential generated at the first and third terminals connected to each other when the fourth and second terminals are connected to the first and second reference potentials, respectively, and
- wherein the ratio R of the second ferroelectric capacitor's average capacitance at the time of non-inversion to the first ferroelectric capacitor's average capacitance at the time of non-inversion satisfies the following relation:
- 1/(1+C0/C1·R)−1/(1+R) ≧0.75·(1/(1+√(C0/C1))−1/(1+√(C1/C0)))
- wherein
- C0:
- the first ferroelectric capacitor's average capacitance at the time of non-inversion, and
- C1:
- the first ferroelectric capacitor's average capacitance at the time of inversion.
Dependencies are inferred from the claim text.