Standard cell library having cell drive strengths selected according to delay

A method for constructing a cell library for use in automatic design of a large scale circuit, the method comprising:

• a) providing a plurality of cell functions, each having a corresponding nominal cell function load, wherein said plurality of cell functions includes at least one clock-related function;
• b) providing, for each of said plurality of cell functions, three or more cells, each having a drive strength and a delay at said nominal cell function load depending on said drive strength;
• c) selecting said delays to be substantially equal to a set of predetermined design delays for each of said plurality of cell functions;
• wherein a design delay spacing is defined for each pair of said cells performing the same one of said plurality of cell functions and having adjacent delays by taking a difference of the delays of the two cells of said pair;
• wherein the design delay spacings corresponding to at least one of said plurality of cell functions do not decrease as drive strength increases;
• and
• d) providing said, three or more cells for each of said plurality of cell functions as an output cell library.

A set of computer instructions recorded on a computer-readable medium and executable by a computer for providing a cell library for automatic design of a large scale circuit, the cell library comprising:

• a plurality of cells providing a plurality of cell functions;
• wherein said plurality of cell functions includes at least one clock-related function;
• wherein each of said plurality of cell functions has a corresponding nominal cell function load;
• wherein each of said plurality of cell functions is provided by three or more of said cells, each having a drive strength and a delay at said nominal cell function load depending on said drive strength;
• wherein said delays are substantially equal to a set of predetermined design delays for each of said plurality of cell functions;
• wherein a design delay spacing is defined for each pair of said cells performing the same one of said plurality of cell functions and having adjacent delays by taking a difference of the delays of the two cells of said pair;
• and
• wherein the design delay spacings corresponding to at least one of said plurality of cell functions do not decrease as drive strength increases.