Single-mask phase change memory element
AssigneeMacronix International Co., Ltd.
InventorsHsiang-Lan Lung, Rich Liu, Yi-Chou Chen, Shih-Hung Chen
Life of this patent
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Abstract
A memory device. An array of memory elements is formed on a semiconductor chip. A parallel array of word lines extends in a first direction, connecting each memory element to a data source, and a parallel array of bit lines extends in a second direction, connecting each memory element to a data source, the second direction forming an acute angle to the first direction. The connection between each bit line and each memory element is a phase change element composed of memory material having at least two solid phases.
Claims17
A memory device, comprising:
- an array of memory elements, formed on a semiconductor chip;
- a parallel array of word lines, extending in a first direction, connecting each memory element to a first data source;
- a parallel array of bit lines, extending in a second direction, connecting each memory element to a second data source, the second direction forming an acute angle to the first direction;
- and
- wherein the connection between each bit line and each memory element is a phase change element composed of memory material having at least two solid phases, and wherein the phase change elements lie above the lines in the memory element.
A memory device, comprising:
- an array of memory elements, formed on a semiconductor chip, each memory element including a drain electrode;
- a parallel array of word lines, extending in a first direction, connecting each memory element to a first data source;
- a parallel array of bit lines, extending in a second direction, connecting each memory element to a second data source at the drain electrode, the second direction forming an acute angle to the first direction;
- wherein the connection between each bit line and each memory element is a phase change element composed of memory material having at least two solid phases;
- and
- wherein the bit lines, the phase change elements and the drain electrodes all lie on the same level within the semiconductor chip.
Dependencies are inferred from the claim text.