# US 7,412,638 B2 · Method, system, and program product for controlling test data of a logic built-in self-test of an integrated circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,412,638 B2 - Document ID: US7412638B2 - Status: Granted - Kind: B2 - Application number: 11/762,889 - Filed: 2007-06-14 - Published: 2007-10-11 - Granted: 2008-08-12 - Earliest claimed: 2004-11-04 - Assignees: International Business Machines Corporation - Inventors: Marvin J. Rich; Jay R. Herring - Web page: https://patentgrep.com/patent/US7412638B2 ## CPC - G01R 31/318547: {Data generators or compressors} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract A method of controlling test data with a boundary latch module having a plurality of latches to facilitate logic built-in self-testing of an integrated circuit (IC) is provided which includes providing a plurality of selection devices for selecting initialization data to store in the plurality of latches of the IC's boundary latch module. The initialization data is selected from a plurality of scan paths of the integrated circuit, and the initialization data from at least one of the latches is provided as input to a logic circuit of the IC or output of the IC. In another aspect, the method includes selecting a datum from an external input or test-pattern generator of the integrated circuit for capture in at least one of the latches and input to a multiple-input signature register, which stores a signature of the integrated circuit resulting from the logic built-in self-testing. ## Claims ### Claim 1 A method of controlling test data with a boundary latch module having a plurality of latches to facilitate testing an external signal path of an integrated circuit concurrently with logic built-in self testing of the integrated circuit, the method comprising: (i) providing a plurality of selection devices coupled to a plurality latches of a boundary latch module, the plurality of selection devices for selecting initialization data to store in the plurality of latches of the boundary latch module of the integrated circuit; (ii) utilizing the plurality of selection devices to select the initialization data from a plurality of scan paths of the integrated circuit; (iii) providing the initialization data from at least one of the plurality of latches as at least one output of the integrated circuit for testing at least one external signal path of the integrated circuit; (iv) providing another selection device in the another boundary latch module, the another selection device for selecting an external datum provided by an external input to the integrated circuit or a test-pattern datum from test-pattern generator logic of the integrated circuit; (v) utilizing the another selection device to select the external datum or the test-pattern datum as a datum for capture in at least one of the plurality of latches of the another boundary latch module; and (vi) providing the datum captured by the at least one of the plurality of latches of the another boundary latch module as at least one input to a multiple-input signature register, the multiple-input signature register storing a signature of the integrated circuit resulting from the logic built-in self-testing. ### Claim 2 (depends on 1) The method of claim 1, wherein test-pattern generator logic of the integrated circuit provides the initialization data to the plurality of scan paths. ### Claim 3 (depends on 1) The method of claim 1, further comprising providing a drive-enable control signal to the boundary latch module, the drive-enable control signal enabling the boundary latch module to drive an output pin of the integrated circuit. ### Claim 4 (depends on 3) The method of claim 3, further comprising: (iv) capturing the drive-enable control signal in at least one of the plurality of latches; and (v) providing the drive-enable control signal as at least one input to a multiple-input signature register, the multiple-input signature register storing a signature of the integrated circuit resulting from the logic built-in self-testing. ### Claim 5 (depends on 1) The method of claim 1, wherein the plurality of selection devices comprises a plurality of multiplexers. ### Claim 6 (depends on 1) The method of claim 1, further comprising providing a switching device for controlling when the boundary latch module drives an output pin of the integrated circuit. ### Claim 7 (depends on 6) The method of claim 6, wherein the switching device comprises a tri-state buffer. ### Claim 8 A system for controlling test data with a boundary latch module having a plurality of latches to facilitate testing an external signal path of an integrated circuit concurrently with logic built-in self testing of the integrated circuit, the system comprising: (i) a plurality of selection devices coupled to a plurality latches of a boundary latch module, the plurality of selection devices for selecting initialization data to store in the plurality of latches of the boundary latch module of the integrated circuit; (ii) means for utilizing the plurality of selection devices to select the initialization data from a plurality of scan paths of the integrated circuit; (iii) means for providing the initialization data from at least one of the plurality of latches as at least one output of the integrated circuit for testing at least one external signal path of the integrated circuit; (iv) another selection device in the another boundary latch module, the another selection device for selecting an external datum provided by an external input to the integrated circuit or a test-pattern datum from test-pattern generator logic of the integrated circuit; (v) means for utilizing the another selection device to select the external datum or the test-pattern datum as a datum for capture in at least one of the plurality of latches of the another boundary latch module; and (vi) means for providing the datum captured by the at least one of the plurality of latches of the another boundary latch module as at least one input to a multiple-input signature register, the multiple-input signature register storing a signature of the integrated circuit resulting from the logic built-in self-testing. ### Claim 9 (depends on 8) The system of claim 8, wherein test-pattern generator logic of the integrated circuit provides the initialization data to the plurality of scan paths. ### Claim 10 (depends on 8) The system of claim 8, further comprising means for providing a drive-enable control signal to the boundary latch module, the drive-enable control signal enabling the boundary latch module to drive an output pin of the integrated circuit. ### Claim 11 (depends on 10) The system of claim 10, further comprising: (iv) means for capturing the drive-enable control signal in at least one of the plurality of latches; and (v) means for providing the drive-enable control signal as at least one input to a multiple-input signature register, the multiple-input signature register storing a signature of the integrated circuit resulting from the logic built-in self-testing. ### Claim 12 (depends on 8) The system of claim 8, wherein the plurality of selection devices comprises a plurality of multiplexers. ### Claim 13 (depends on 8) The system of claim 8, further comprising a switching device for controlling when the boundary latch module drives an output pin of the integrated circuit. ### Claim 14 (depends on 13) The system of claim 13, wherein the switching device comprises a tri-state buffer. ### Claim 15 At least one program storage device readable by a machine embodying at least one program of instructions executable by the machine to perform a method of controlling test data with a boundary latch module having a plurality of latches to facilitate testing an external signal path of an integrated circuit concurrently with logic built-in self testing of the integrated circuit, the method comprising: (i) providing a plurality of selection devices coupled to a plurality latches of a boundary latch module, the plurality of selection devices for selecting initialization data to store in the plurality of latches of the boundary latch module of the integrated circuit; (ii) utilizing the plurality of selection devices to select the initialization data from a plurality of scan paths of the integrated circuit; (iii) providing the initialization data from at least one of the plurality of latches as at least one output of the integrated circuit for testing at least one external signal path of the integrated circuit; (iv) providing another selection device in the another boundary latch module, the another selection device for selecting an external datum provided by an external input to the integrated circuit or a test-pattern datum from test-pattern generator logic of the integrated circuit; (v) utilizing the another selection device to select the external datum or the test-pattern datum as a datum for capture in at least one of the plurality of latches of the another boundary latch module; and (vi) providing the datum captured by the at least one of the plurality of latches of the another boundary latch module as at least one input to a multiple-input signature register, the multiple-input signature register storing a signature of the integrated circuit resulting from the logic built-in self-testing.