# US 7,412,342 B2 · Low cost test for IC's or electrical modules using standard reconfigurable logic devices

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,412,342 B2
- Document ID: US7412342B2
- Status: Granted
- Kind: B2
- Application number: 10/975,855
- Filed: 2004-10-28
- Published: 2006-05-11
- Granted: 2008-08-12
- Earliest claimed: 2004-10-28
- Assignees: Intel Corporation
- Inventors: Stephen S. Sturges; Brad Inman; Robert C. Hash
- Web page: https://patentgrep.com/patent/US7412342B2

## CPC

- G01R 31/318516: {Test of programmable logic devices [PLDs]}
- G01R 31/3172: {Optimisation aspects, e.g. using functional pin as test pin, pin multiplexing}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

Low cost test for Integrated Circuits or electrical modules using a reconfigurable logic device is described. In one embodiment, the invention includes configuring a reconfigurable logic device to comply with input standards of a device under test, applying test signals to the device under test, detecting output results of the device under test, and analyzing the detected output results.

## Claims

### Claim 1

A method comprising
configuring a reconfigurable logic device to comply with input standards of a device under test;
setting an electrical configuration of an I/O pin of the logic device, the I/O pin being directly coupled to a pin of the device under test;
applying test signals to the device under test through the I/O pin;
detecting output results of the device under test at a signal detector, the signal detector being coupled to the reconfigurable logic device for two-way communication to receive control signals from the logic device; and
analyzing the detected output results by measuring the voltage of the detected output results at the signal detector and sending the voltage measurements from the signal detector to the logic device.

### Claim 2 (depends on 1)

The method of claim 1, wherein applying test signals comprises applying test signals from the I/O pin to the coupled pin of the device under test.

### Claim 3 (depends on 1)

The method of claim 1, further comprising reporting the analysis.

### Claim 4 (depends on 1)

The method of claim 1, further comprising reconfiguring the configurable logic device to apply further test signals, applying the further test signals, and analyzing the further test signals.

### Claim 5 (depends on 4)

The method of claim 4, further comprising repeating reconfiguring and applying further test signals and analyzing further results.

### Claim 6 (depends on 1)

The method of claim 1, wherein the configurable logic device comprises a field programmable gate array.

### Claim 7 (depends on 1)

The method of claim 1, wherein configuring comprises sending commands from a general purpose station controller to the reconfigurable logic device.

### Claim 8 (depends on 1)

The method of claim 1, wherein setting an electrical configuration comprises applying a pull-up resistor to the I/O pin.

### Claim 9 (depends on 1)

The method of claim 1, wherein applying comprises applying test signals to an input pin of the device under test and analyzing comprises detecting voltages at the input pin.

### Claim 10

An article comprising a machine readable medium including data that when accessed by a machine causes the machine to perform operations comprising:
configuring a reconfigurable logic device to comply with input standards of a device under test;
setting an electrical configuration of an I/O pin of the logic device, the I/O pin being directly coupled to a pin of the device under test;
applying test signals to the device under test through the I/O pin; and
receiving voltage measurements from a signal detector coupled to the reconfigurable logic device for two-way communication, the signal detector receiving control signals from the logic device, receiving output results from the device under test through the I/O pin, measuring the voltage thereof, and sending the voltage measurements from the signal detector to the logic device.

### Claim 11 (depends on 10)

The article of claim 10, wherein the data further comprises data causing the machine to perform further operations comprising powering up the device under test after configuring.

### Claim 12 (depends on 11)

The article of claim 11, wherein the data further comprises data causing the machine to perform further operations comprising reconfiguring the configurable logic device to apply further test signals, applying the further test signals, and analyzing the further test signals.

### Claim 13 (depends on 11)

The article of claim 11, wherein configuring comprises sending commands from a general purpose station controller to the reconfigurable logic device.

### Claim 14

An apparatus comprising:
a reconfigurable logic device to generate test signals to be applied from pins of the reconfigurable logic device to pins of a device under test, the logic device being directly coupled to the device under test; and
a signal detector to detect signals from the pins of the device under test, to generate a voltage measurement of the detected signals, and to send the voltage measurement to the logic device, the logic device being coupled to the signal detector for two-way communications, wherein the logic device sends control signals to the signal detector and receives voltage measurements from the signal detector.

### Claim 15 (depends on 14)

The apparatus of claim 14, wherein the logic device is coupled to an external interface to receive control signals to run test procedures directed to the device under test.

### Claim 16 (depends on 14)

The apparatus of claim 14, wherein the logic device is coupled to the device under test through a plurality of I/O pins and wherein the logic device is coupled to an external interface to receive control signals to reconfigure the I/O pins.

### Claim 17 (depends on 14)

The apparatus of claim 14, wherein the voltage measurement comprises a threshold comparison from the signal detector.

### Claim 18 (depends on 14)

The apparatus of claim 14, wherein the signal. detector comprises a voltage comparator.

### Claim 19

An apparatus comprising:
a reconfigurable logic device to generate test signals to be applied from pins of the reconfigurable logic device to pins of a device under test;
a socket to carry the device under test, the socket having connectors coupled to the pins of the device under test to carry signals to and from the pins, so that the logic device is directly coupled to a device under test, when the device under test is in the socket;
a signal detector to detect signals from the connectors of the socket, and to generate a voltage measurement of the detected signals, the signal detector also being coupled to the reconfigurable logic device for two-way communications to send the voltage measurement to the logic device and to receive control signals from the logic device; and
a circuit board to couple pins of the reconfigurable logic device to connectors of the socket.

### Claim 20 (depends on 19)

The apparatus of claim 19, further comprising a power supply to supply power to a device under test carried by the socket.

### Claim 21 (depends on 20)

The apparatus of claim 20, further comprising an external interface on the circuit board to receive control signals to control the power supply.

### Claim 22 (depends on 19)

The apparatus of claim 19, further comprising an external interface on the circuit board to receive control signals to reconfigure the reconfigurable logic device.

### Claim 23 (depends on 19)

The apparatus of claim 19, wherein the reconfigurable logic device comprises a field programmable gate array.

### Claim 24 (depends on 19)

The apparatus of claim 19, wherein the signal detector comprises a voltage comparator.

### Claim 25

An apparatus comprising:
a reconfigurable logic device to generate test signals to be applied from pins of the reconfigurable logic device to pins of a device under test;
a socket to carry the device under test, the socket having connectors coupled to the pins of the device under test to carry signals to and from the pins, so that the logic device is directly coupled to a device under test, when the device under test is in the socket;
a signal detector coupled to the reconfigurable logic device to detect signals from the connectors of the socket, and to generate a voltage measurement of the detected signals, the signal detector also being coupled to the reconfigurable logic device for two-way communications to and to send the voltage measurement to the logic device and to receive control signals from the logic device;
a circuit board to couple pins of the reconfigurable logic device to connectors of the socket;
a power supply to supply power to a device under test carried by the socket; and
an external interface on the circuit board to receive control signals to control the power supply.

### Claim 26 (depends on 25)

The apparatus of claim 25, further comprising an external interface on the circuit board to receive control signals to reconfigure the reconfigurable logic device.

### Claim 27 (depends on 26)

The apparatus of claim 26, wherein the signal detector comprises a voltage comparator.