# US 7,411,835 B2 · Discharge circuit for a capacitive load > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,411,835 B2 - Document ID: US7411835B2 - Status: Granted - Kind: B2 - Application number: 11/153,863 - Filed: 2005-06-15 - Published: 2006-01-05 - Granted: 2008-08-12 - Earliest claimed: 2004-06-15 - Assignees: Infineon Technologies AG - Inventors: Franz Michael Darrer - Web page: https://patentgrep.com/patent/US7411835B2 ## CPC - H03K 17/6871: {the output circuit comprising more than one controlled field-effect transistor} - H03K 17/04206: {in field-effect transistor switches} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A circuit arrangement for the defined discharge of a capacitive load includes a first connecting terminal for connection of the load, a second connecting terminal for application of a predetermined potential, and a third connecting terminal for application of a discharge signal. The circuit arrangement further includes a first switching element, having a load path and a control connection, the load path of which is connected between the first and second connecting terminals and a second switching element, having a load path and a control connection, the load path of which is connected between the first connecting terminal and a terminal for reference potential. The first switching element is driven in a manner dependent on a switching state of the second switching element. The second switching element is driven by a drive circuit to which the discharge signal is fed and which includes a comparator arrangement. ## Claims ### Claim 1 A circuit arrangement for discharge of a capacitive load, the circuit arrangement comprising: a first and second switching element each including a load path and a control connection, the load path of the first switching element configured to controllably connect the capacitive load and a predetermined potential, the load path of the second switching element configured to controllably connect the capacitive load and a reference potential, the first switching element being driven in a manner dependent on a switching state of the second switching element; a drive circuit for the second switching element configured to receive a discharge signal, the drive circuit comprising: a third switching element including a load path and a control connection, the load path of the third switching element configured to controllably connect the predetermined potential and the control connection of the second switching element; and a bias voltage source for operable connection between the capacitive load and the control connection of the third switching element. ### Claim 2 (depends on 1) The circuit arrangement of claim 1, wherein the third switching element comprises a transistor component; and further wherein the bias voltage source includes a diode element configured to be operably connected between the capacitive load and the control connection of the third switching element. ### Claim 3 (depends on 1) The circuit arrangement of claim 1, wherein the bias voltage source comprises: a first transistor component including a load path, a first and second load connection and a control connection, the load path configured to controllably connect the capacitive load and the control connection of the third switching element; a second transistor component including a load path operably connected between the control connection of the first transistor component and the first load connection of the first transistor component, the second transistor component being driven by a drive signal of the first switching element; and a third transistor component including a load path operably connected between the control connection of the first transistor component and the second load connection of the first transistor component, the third transistor component being driven by a drive signal of the second switching element. ### Claim 4 (depends on 3) The circuit arrangement of claim 3, wherein the first, second and third transistor components of the bias voltage source are of the same conductivity type. ### Claim 5 (depends on 1) The circuit arrangement of claim 1, further comprising a first current source arrangement for being operably connected in series between the load path of the second switching element and the reference potential; and wherein the control connection of the first switching element is operably connected to the load path of the second switching element and the first current source arrangement. ### Claim 6 (depends on 5) The circuit arrangement of claim 5, wherein the drive circuit includes a second current source arrangement configured to be operably connected in series between a diode element and the reference potential and a third current source arrangement configured to be operably connected in series between the load path of the third switching element and the reference potential. ### Claim 7 (depends on 6) The circuit arrangement of claim 6, wherein currents supplied by the second current source and the third current source have a predetermined ratio in relation a current supplied by the first current source. ### Claim 8 (depends on 6) The circuit arrangement of claim 6, wherein the first, second and third current source arrangements each include a transistor element driven by the discharge signal and a resistive element operably connected in series with the transistor element. ### Claim 9 (depends on 5) The circuit arrangement of claim 5, further comprising a further transistor component including a load path operably connected between the control connection of the second switching element and the reference potential, the further transistor component configured to be driven by the discharge signal. ### Claim 10 (depends on 1) The circuit arrangement of claim 1, wherein the drive circuit further comprises a further switching element configured to be driven by a drive signal of the first switching element, the further switching element including a load path operably connected in series with the third switching element. ### Claim 11 (depends on 1) The circuit arrangement of claim 1, wherein the first, second and third switching elements comprise transistor components of the same conductivity type. ### Claim 12 (depends on 1) The circuit arrangement of claim 1, wherein the circuit arrangement is used in an EEPROM memory for the controlled discharge of at least one of a programming line, a programming/read line, an erase line or an erase/read line. ### Claim 13 A circuit arrangement for the discharge of a capacitive load, the circuit arrangement comprising: a first switching element configured to controllably connect the capacitive load and a predetermined potential, a second switching element configured to controllably connect the capacitive load and a reference potential; and a drive circuit configured to drive the second switching element; wherein the drive circuit drives the second switching element in a manner dependent on a comparison of the capacitive load and the predetermined potential; and wherein the first switching element is driven in a manner dependent on a switching state of the second switching element. ### Claim 14 (depends on 13) The circuit arrangement of claim 13, wherein the first and second switching elements each comprise transistor components including a load path and a control connection, the load path of the first switch element being operably connected between the capacitive load and the predetermined potential, the load path of the second switching element being operably connected between the capacitive load and the reference potential. ### Claim 15 (depends on 14) The circuit arrangement of claim 14, wherein the drive circuit comprises a third switching element and a bias voltage source, the third switching element comprising a transistor component including a load path and a control connection, the load path of the third switching element being operably connected between predetermined potential and the control connection of the second switching element, and the bias voltage source being operably connected between the capacitive load and the control connection of the third switching element. ### Claim 16 (depends on 15) The circuit arrangement of claim 15, wherein the bias voltage source comprises a diode element configured to be connected to the capacitive load and the control connection of the third switching element. ### Claim 17 (depends on 15) The circuit arrangement of claim 15, wherein the bias voltage source comprises: a first transistor component including a load path, a first and second load connection and a control connection, the load path of the first transistor configured to controllably connect the capacitive load and the control connection of the third switching element; a second transistor component including a load path operably connected between the control connection of the first transistor component and the first load connection of the first transistor component, the second transistor component being driven by a drive signal of the first switching element; and a third transistor component including a load path operably connected between the control connection of the first transistor component and the second load connection of the first transistor component, the third transistor component being driven by a drive signal of the second switching element. ### Claim 18 (depends on 15) The circuit arrangement of claim 15, wherein the first, second and third switching elements comprise transistor components of the same conductor type. ### Claim 19 (depends on 15) The circuit arrangement of claim 15, further comprising a further transistor component including a load path operably connected between the control connection of the second switching element and the reference potential, the further transistor component configured to be driven by the discharge signal. ### Claim 20 A method for discharging a capacitive load, the method comprising: providing a first and second switching element each including a control connection; controllably connecting the capacitive load and a predetermined potential using the first switching element; controllably connecting the capacitive load and a reference potential using the second switching element; driving the first switching element in a manner dependent on a switching state of the second switching element; receiving a discharge signal at a drive circuit for the second switching element, the drive circuit comprising a third switching element including a control connection; controllably connecting the predetermined potential and the control connection of the second switching element; and connecting a bias voltage source between the capacitive load to the control connection of the third switching element.