Class AB folded cascode stage and method for low noise, low power, low-offset operational amplifier
AssigneeTexas Instruments Incorporated
InventorsSergey V. Alenin, Henry Surtihadi
Life of this patent
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Abstract
An amplifier circuit includes an pair of input transistors, the drains of which are connected to emitters of first and second cascode transistors. First and second controlled current sources are connected to the emitters of the first and second cascode transistors, respectively, and third and fourth controlled current sources are connected to the collectors thereof. A bias circuit controls the 4 controlled current sources in response to the emitter voltage of a pair of input transistors of an output stage the inputs of which are connected to the drains of the first and second cascode transistors.
Claims23
An operational amplifier circuit comprising:
- (a) an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively;
- (b) a folded cascode circuit including
- i. first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, the first electrode of the first cascode transistor being coupled by a first conductor to the first input transistor and the first load device, the first electrode of the second cascode transistor being coupled by a second conductor to the second input transistor and the second load device, the control electrodes being coupled to a first bias voltage,
- ii. a first controlled current source coupled between the first electrode of the first cascode transistor and a first reference voltage, a second controlled current source coupled between the first electrode of the second cascode transistor and the first reference voltage, a third controlled current source coupled between the second electrode of the first cascode transistor and a second reference voltage, and a fourth controlled current source coupled between the second electrode of the second cascode transistor and the second reference voltage;
- (c) a second stage having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source, the tail current conductor having a node at which a voltage representative of a common mode input voltage of the second stage is established, and first and second compensation capacitors coupled to the first and second inputs, respectively, of the output stage;
- and
- (d) a bias circuit, coupled to the second stage node, for biasing control terminals of the first, second, third, and fourth controlled current sources in response to the common mode input voltage established at the tail current conductor.
An operational amplifier circuit comprising:
- an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively;
- a folded cascode circuit including
- i. first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, the first electrode of the first cascode transistor being coupled by a first conductor to the first input transistor and the first load device, the first electrode of the second cascode transistor being coupled by a second conductor to the second input transistor and the second load device, the control electrodes being coupled to a first bias voltage,
- ii. a first controlled current source coupled between the first electrode of the first cascode transistor and a first reference voltage, a second controlled current source coupled between the first electrode of the second cascode transistor and the first reference voltage, a third controlled current source coupled between the second electrode of the first cascode transistor and a second reference voltage, and a fourth controlled current source coupled between the second electrode of the second cascode transistor and the second reference voltage;
- a second stage having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source, the tail current conductor establishing a voltage representative of a common mode input voltage of the second stage, and first and second compensation capacitors coupled to the first and second inputs, respectively, of the output stage;
- a bias circuit for biasing control terminals of the first, second, third, and fourth controlled current sources in response to the common mode input voltage established by the tail current conductor;
- a third compensation capacitor coupled to the first conductor;
- and
- a fourth compensation capacitor coupled to the second conductor.
A method of operating an amplifier circuit including (1) an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively, and (2) a folded cascode circuit including first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, the first electrode of the first cascode transistor being coupled by a first conductor to the first input transistor and the first load device, the first electrode of the second cascode transistor being coupled by a second conductor to the second input transistor and the second load device, the control electrodes being coupled to a first bias voltage,
- the method comprising:
- (a) providing a first controlled current source coupled between the first electrode of the first cascode transistor and a first reference voltage, a second controlled current source coupled between the first electrode of the second cascode transistor and the first reference voltage, and also providing a third controlled current source coupled between the second electrode of the first cascode transistor and a second reference voltage, and a fourth controlled current source coupled between the second electrode of the second cascode transistor and the second reference voltage;
- (b) providing a second stage having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source, the tail current conductor having a node at which a voltage representative of a common mode input voltage of the second stage is established;
- and
- (c) biasing control terminals of the first, second, third, and fourth controlled current sources by means of a bias circuit, coupled to the second stage node, in response to the common mode input voltage established at the tail current conductor.
A method of operating an amplifier circuit including (1) an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively, and (2) a folded cascode circuit including first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, the first electrode of the first cascode transistor being coupled by a first conductor to the first input transistor and the first load device, the first electrode of the second cascode transistor being coupled by a second conductor to the second input transistor and the second load device, the control electrodes being coupled to a first bias voltage,
- the method comprising:
- providing a first controlled current source coupled between the first electrode of the first cascode transistor and a first reference voltage, a second controlled current source coupled between the first electrode of the second cascode transistor and the first reference voltage, and also providing a third controlled current source coupled between the second electrode of the first cascode transistor and a second reference voltage, and a fourth controlled current source coupled between the second electrode of the second cascode transistor and the second reference voltage;
- providing a second stage having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source;
- biasing control terminals of the first, second, third, and fourth controlled current sources by means of a bias circuit in response to a signal conducted by the tail current conductor;
- coupling a first compensation capacitor between the first input of the second stage and one of the first and second reference voltages;
- coupling a second compensation capacitor between the output conductor and the second input of the output stage;
- coupling a third compensation capacitor coupled between the first conductor and one of the first and second reference voltages;
- and
- coupling a fourth compensation capacitor between the output conductor and the second conductor.
A method of operating an amplifier circuit including (1) an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively, and (2) a folded cascode circuit including first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, the first electrode of the first cascode transistor being coupled by a first conductor to the first input transistor and the first load device, the first electrode of the second cascode transistor being coupled by a second conductor to the second input transistor and the second load device, the control electrodes being coupled to a first bias voltage,
- the method comprising:
- providing a first controlled current source coupled between the first electrode of the first cascode transistor and a first reference voltage, a second controlled current source coupled between the first electrode of the second cascode transistor and the first reference voltage, and also providing a third controlled current source coupled between the second electrode of the first cascode transistor and a second reference voltage, and a fourth controlled current source coupled between the second electrode of the second cascode transistor and the second reference voltage;
- providing a second stage having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source;
- biasing control terminals of the first, second, third, and fourth controlled current sources by means of a bias circuit in response to a signal developed at the tail current conductor;
- and
- operating the bias circuit to cause quiescent currents through the first and second cascode transistors, respectively, to be substantially less than a tail current supplied by the first tail current source.
An amplifier circuit including
- (a) an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively;
- (b) a folded cascode circuit including first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, the first electrode of the first cascode transistor being coupled by a first conductor to the first input transistor and the first load device, the first electrode of the second cascode transistor being coupled by a second conductor to the second input transistor and the second load device, the control electrodes being coupled to a first bias voltage;
- (c) means for providing a first controlled current source coupled between the first electrode of the first cascode transistor and a first reference voltage, a second controlled current source coupled between the first electrode of the second cascode transistor and the first reference voltage, a third controlled current source coupled between the second electrode of the first cascode transistor and a second reference voltage, and a fourth controlled current source coupled between the second electrode of the second cascode transistor and the second reference voltage;
- (d) output means having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source, the tail current conductor having a node at which a voltage representative of a common mode voltage of the first and second inputs is established;
- and
- (e) means, coupled to the output means node, for biasing control terminals of the first, second, third, and fourth controlled current sources in response to the common mode input voltage established at the tail current conductor.
Dependencies are inferred from the claim text.