DC offset cancellation circuit
AssigneeIndustrial Technology Research Institute
InventorShiau-Wen Kao
Life of this patent
Estimating the term…
Abstract
A DC offset cancellation block is provided for canceling a DC offset in a signal path. The signal path may include an input and an output. The DC offset cancellation block may include an active integrator coupled between the input and the output to provide a negative feedback to the signal path. The active integrator may include an operational-amplifier (op-amp), a capacitive component with a capacitance C, and a resistive component with a resistance R, and the capacitive component may be coupled to the op-amp via a closed feedback loop. The DC offset cancellation block may also include a first amplifier with a gain of GA coupled with the capacitive component in the closed feedback loop such that a RC time constant of the active integrator is changed from RC to RCGA.
Claims23
A DC offset cancellation block for canceling a DC offset in a signal path with an input and an output, comprising:
- an active integrator coupled between the input and the output to provide a negative feedback to the signal path, the integrator including an operational-amplifier (op-amp), a capacitive component with a capacitance C, and a resistive component with a resistance R, wherein the capacitive component is coupled to the op-amp via a closed feedback loop;
- and
- a first amplifier with a gain of GA coupled with the capacitive component in the closed feedback loop such that a RC time constant of the active integrator is changed from RC to RCGA.
A DC offset cancellation block for canceling a DC offset in a signal path with an input having a first terminal and a second terminal and an output having a first terminal and a second terminal, comprising:
- a first resistive component and second resistive component;
- a first capacitive component and a second capacitive component;
- a first amplifier having a first input, a second input, and an output;
- a second amplifier having a first input, a second input, and an output;
- and
- an operational amplifier (op-amp) having a non-inverting input, an inverting input, a non-inverting output, and an inverting output,
- wherein:
- the non-inverting input of the op-amp is coupled to the first terminal of the output via the first resistive component;
- the inverting input of the op-amp is coupled to the second terminal of the output via the second resistive component;
- the non-inverting input of the op-amp is coupled to the output of the first amplifier via the first capacitive component;
- the inverting input of the op-amp is coupled to the output of the second amplifier via the second capacitive component;
- the inverting output of the op-amp is coupled to the first input of the first amplifier;
- the non-inverting output of the op-amp is coupled to the second input of the first amplifier;
- the non-inverting output of the op-amp is coupled to the first input of the second amplifier;
- and
- the inverting output of the op-amp is coupled to the second input of the second amplifier.
A wireless communication terminal, comprising:
- a transceiver configured to receive and transmit communication signals, the transceiver including:
- a signal path with an input and an output;
- an active integrator coupled between the input and the output to provide a negative feedback to the signal path, the integrator including an operational-amplifier (op-amp), a capacitive component with a capacitance C, and a resistive component with a resistance R, wherein the capacitive component is coupled to the op-amp via a closed feedback loop;
- and
- a first amplifier with a gain of GA coupled with the capacitive component in the closed feedback loop such that a RC time constant of the active integrator is changed from RC to RCGA.
Dependencies are inferred from the claim text.