# US 7,411,282 B2 · LSI package provided with interface module, and transmission line header employed in the package > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,411,282 B2 - Document ID: US7411282B2 - Status: Granted - Kind: B2 - Application number: 11/081,617 - Filed: 2005-03-17 - Published: 2005-10-20 - Granted: 2008-08-12 - Earliest claimed: 2004-03-30 - Assignees: Kabushiki Kaisha Toshiba - Inventors: Hideto Furuyama; Hiroshi Hamasaki - Web page: https://patentgrep.com/patent/US7411282B2 ## CPC - G02B 6/4201: {Packages, e.g. shape, construction, internal or external details} - G02B 6/4251: {Sealed packages (G02B6/4248 takes precedence)} - G02B 6/4269: {with heat sinks or radiation fins} - G02B 6/428: {containing printed circuit boards [PCB]} - G02B 6/4284: {of optical modules with disconnectable electrical connectors (latching arms for electrical connectors H01R13/627)} - G02B 6/4202: {for coupling an active element with fibres without intermediate optical elements, e.g. fibres with plane ends, fibres with shaped ends, bundles} - G02B 6/4249: {comprising arrays of active devices and fibres} - H10W 72/072: {of bump connectors} - H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting} - H10W 72/073: {of die-attach connectors} - H10W 72/074: {of anisotropic conductive adhesives} - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics} - H10W 72/90: Bond pads, in general - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An LSI package encompasses a transmission line header embracing a header-base, a transmission line held by the header-base, and an interface IC chip mounted on the header-base, an interposer substrate having a plurality of board-connecting joints, which facilitate connection with the printed wiring board; an LSI chip mounted on the interposer substrate; and a receptacle having a lead terminal and being mounted on the interposer substrate, configured to accommodate the transmission line header so that the interface IC chip electrically connects to the LSI chip through the lead terminal. ## Claims ### Claim 1 An LSI package mountable on a printed wiring board, comprising: a transmission line header comprising: a header-base, a transmission line held by the header-base, and an interface IC chip mounted on the header-base; an interposer substrate having a plurality of board-connecting joints, which facilitate connection with the printed wiring board; an LSI chip mounted on the interposer substrate; and a receptacle having a lead terminal and being mounted on the interposer substrate, configured to accommodate the transmission line header so that the interface IC chip electrically connects to the LSI chip through the lead terminal. ### Claim 2 (depends on 1) The package of claim 1, further comprising a heat sink provided on the receptacle. ### Claim 3 (depends on 1) The package of claim 1, wherein the receptacle has an opening configured to transport away thermal energy from the interface IC chip. ### Claim 4 (depends on 2) The package of claim 2, wherein thermal energy generated in the interface IC chip is transported away to the heat sink. ### Claim 5 (depends on 1) The package of claim 1, wherein the receptacle further comprises a thermal connector configured to transport away thermal energy from the interface IC chip. ### Claim 6 (depends on 5) The package of claim 5, wherein thermal energy generated in the interface IC chip is transported away to the interposer substrate through the thermal connector. ### Claim 7 (depends on 5) The package of claim 5, wherein the thermal connector is formed of thermally conductive material having elasticity. ### Claim 8 (depends on 1) The package of claim 1, wherein digital signal propagates from the LSI chip to the interface IC chip through the receptacle. ### Claim 9 (depends on 1) The package of claim 1, wherein differential digital signal propagates from the LSI chip to the interface IC chip through the receptacle. ### Claim 10 (depends on 1) The package of claim 1, wherein the transmission line comprises an optical transmission line. ### Claim 11 (depends on 10) The package of claim 10, wherein the transmission line header further comprises an optical semiconductor chip. ### Claim 12 An LSI package mountable on a printed wiring board, comprising: an interposer substrate defined by a first main surface and a second main surface being opposite to the first main surface, having a plurality of board-connecting joints at the second main surface, which facilitate connection with the printed wiring board; an LSI chip mounted on a mount-area assigned in the first main surface; and a receptacle having a lead terminal and being mounted on the interposer substrate, configured to accommodate the transmission line header so that the interface IC chip electrically connects to the LSI chip through the lead terminal. ### Claim 13 (depends on 12) The package of claim 12, further comprising a first surface interconnection provided on the first main surface, wherein the lead terminal electrically connects to the LSI chip through the first surface interconnection. ### Claim 14 (depends on 12) The package of claim 12, further comprising: first and second through-hole electrodes penetrating the interposer substrate from the first main surface to the second main surface; and a second surface interconnection connecting the first and second through-hole electrodes at the second main surface, wherein the lead terminal electrically connects to the LSI chip through the second through-hole electrode, the second surface interconnection and the first through-hole electrode. ### Claim 15 (depends on 2) The package of claim 2, wherein the receptacle has a thermal connector configured to transport away thermal energy from the interface IC chip to at least one of the heat sink and the interposer substrate. ### Claim 16 (depends on 15) The package of claim 15, wherein the thermal connector is formed of thermally conductive material having elasticity. ### Claim 17 (depends on 16) The package of claim 16, wherein the transmission line header further comprises an optical semiconductor chip. ### Claim 18 (depends on 12) The package of claim 12, wherein the receptacle has a thermal connector configured to transport thermal energy away from an interface IC chip to the interposer substrate, the interface IC chip is provided in a transmission line header, and when the transmission line header is adapted to the receptacle, the interface IC chip and the LSI chip are electrically connected, and a heat conduction passage from the interface IC chip to the interposer substrate through the thermal connector is provided. ### Claim 19 (depends on 18) The package of claim 18, wherein the thermal connector is formed of thermally conductive material having elasticity. ### Claim 20 (depends on 18) The package of claim 18, further comprising a heat sink provided on the receptacle, wherein thermal energy generated in the interface IC chip is transported away through the thermal connector to at least one of the heat sink and the interposer substrate.