# US 7,410,907 B2 · Fabricating integrated devices using embedded masks > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,410,907 B2 - Document ID: US7410907B2 - Status: Granted - Kind: B2 - Application number: 11/095,071 - Filed: 2005-03-31 - Published: 2006-10-12 - Granted: 2008-08-12 - Earliest claimed: 2005-03-31 - Assignees: Lucent Technologies Inc. - Inventors: Dennis S. Greywall - Web page: https://patentgrep.com/patent/US7410907B2 ## CPC - B81C 1/00404: {Mask characterised by its size, orientation or shape} - B81B 2201/033: Comb drives - B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01) - B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00) ## Abstract A method of fabricating a device using a multi-layered wafer that has an embedded etch mask adapted to map a desired device structure onto an adjacent (poly)silicon layer. Due to the presence of the embedded mask, it becomes possible to delay the etching that forms the mapped structure in the (poly)silicon layer until a relatively late fabrication stage. As a result, flatness of the (poly)silicon layer is preserved for the deposition of any necessary over-layers, which substantially obviates the need for filling the voids created by the structure formation with silicon oxide. ## Claims ### Claim 1 A method of fabricating an integrated device, comprising: (A) forming first and second embedded masks in a multi-layer wafer, each of said masks in contact with one or more layers of the wafer, wherein (i) the first embedded mask is in contact with a first layer of the wafer and (ii) the second embedded mask is in contact with a second different layer of the wafer; and (B) etching, using a first etchant, a portion of the first layer and a portion of the second layer from the wafer, wherein: the first embedded mask protects one or more other portions of the first layer from being removed by the first etchant during the etching; the second embedded mask protects one or more other portions of the second layer from being removed by the first etchant during the etching; and the first etchant is capable of removing material of the portions being protected by the first and second embedded masks. ### Claim 2 (depends on 1) The invention of claim 1, further comprising removing at least one of the first and second embedded masks from the wafer after performing the etching. ### Claim 3 (depends on 1) The invention of claim 1, wherein step (A) comprises: (A1) forming the first mask over the first layer of the wafer; and (A2) depositing a cover layer over the first mask and the first layer to embed the first mask into the wafer. ### Claim 4 (depends on 3) The invention of claim 3, wherein step (B) comprises front-side etching, wherein the first embedded mask protects portions of the first layer from being removed. ### Claim 5 (depends on 3) The invention of claim 3, wherein step (B) comprises backside etching, wherein the first embedded mask protects portions of the cover layer from being removed. ### Claim 6 (depends on 3) The invention of claim 3, wherein the first mask comprises silicon oxide and each of the first and cover layers comprises silicon. ### Claim 7 (depends on 3) The invention of claim 3, wherein at least one of the first and cover layers has a thickness of at least about 10 μm. ### Claim 8 (depends on 1) The invention of claim 1, wherein: the wafer comprises a substrate layer and a plurality of layers deposited over the substrate layer; and step (B) comprises creating an opening in the substrate layer to expose at least one of the first and second embedded masks. ### Claim 9 (depends on 1) The invention of claim 1, wherein step (B) comprises subjecting the wafer to dry etching, wherein at least one of the first and second embedded masks acts as an etch stop for the dry etch. ### Claim 10 (depends on 1) The invention of claim 1, wherein each of the first and second embedded masks is adapted to map a corresponding structure onto at least one of the one or more corresponding contact layers and step (B) comprises forming the mapped structures. ### Claim 11 (depends on 10) The invention of claim 10, wherein the formed structure defines a via having an aspect ratio of about 5:1 or greater. ### Claim 12 (depends on 10) The invention of claim 10, further comprising releasing at least one of the formed structures to make said structure movable with respect to the other formed structure. ### Claim 13 (depends on 10) The invention of claim 10, wherein: the first embedded mask maps a first structure located at a first offset distance from a substrate; and the second embedded mask maps a second structure located at a different second offset distance from the substrate. ### Claim 14 (depends on 13) The invention of claim 13, wherein: the first structure is a first comb-shaped portion of a comb drive; and the second structure is a second comb-shaped portion of the comb drive, said first and second comb-shaped portion being interleaved with one another. ### Claim 15 (depends on 1) The invention of claim 1, wherein step (A) comprises: (A1) forming the first embedded mask over a substrate; (A2) forming the second embedded mask over the substrate such that the first embedded mask is interposed between the second embedded mask and the substrate; and (A3) depositing a layer that buries the second embedded mask, wherein the first and second masks have different patterns.