# US 7,410,896 B2 · Semiconductor device having low-k dielectric film in pad region and method for manufacture thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,410,896 B2 - Document ID: US7410896B2 - Status: Granted - Kind: B2 - Application number: 11/328,954 - Filed: 2006-01-09 - Published: 2006-05-25 - Granted: 2008-08-12 - Earliest claimed: 2003-03-27 - Assignees: Samsung Electronics Co., Ltd. - Inventors: Hong-Jae Shin - Web page: https://patentgrep.com/patent/US7410896B2 ## CPC - H10W 72/019: {of bond pads} - H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants - H10W 72/536: {the connected ends being ball-shaped} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/9232: {with additional elements interposed between layers} - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 72/951: {Materials of bond pads} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 72/983: {Reinforcing structures, e.g. collars} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A low-k dielectric film is formed on an entire surface of a substrate having a pad region and a circuit region. A resist pattern is formed on the low-k dielectric film, and an opening is formed in the low-k dielectric film of the pad region using the resist pattern as a mask. A silicon oxide film having strength higher than the low-k dielectric film is formed in the opening using liquid-phase deposition method. Wirings are formed in the silicon oxide film of the pad region and in the low-k dielectric film of the circuit region using damascene method. ## Claims ### Claim 1 A method for manufacturing a semiconductor device having a pad region and a circuit region, comprising: forming a low-k dielectric film on an entire surface of a substrate, the low-k dielectric film having dielectric constant of no more than 3; forming an opening in the low-k dielectric film of the pad region, wherein forming the opening includes: forming a second insulating film on the low-k dielectric film; and forming a resist pattern on the second insulating film; forming a first insulating film having higher strength than the low-k dielectric film in the opening; and forming wirings on the first insulating film of the pad region and on the low-k dielectric film of the circuit region using a damascene process. ### Claim 2 (depends on 1) The manufacturing method according to claim 1, wherein forming the first insulating film includes forming a silicon oxide film by liquid-phase deposition. ### Claim 3 (depends on 1) The manufacturing method according to claim 1, further including forming multi-layer wirings by repeatedly forming a low-k dielectric film, forming an opening, forming a first insulating film and forming wirings, and forming a bonding pad on a wiring of the multi-layer wirings of the pad region most distant from the substrate. ### Claim 4 (depends on 1) The manufacturing method according to claim 1, wherein forming the opening further includes: patterning the second insulating film and the low-k dielectric film using the resist pattern as mask. ### Claim 5 (depends on 1) The manufacturing method according to claim 1, further comprising removing the resist pattern after forming the first insulating film in the opening. ### Claim 6 (depends on 5) The manufacturing method according to claim 5, further comprising removing the second insulating film after removing the resist pattern. ### Claim 7 (depends on 5) The manufacturing method according to claim 5, wherein forming the first insulating film in the opening comprises forming the first insulating film without forming the first insulating film on the resist pattern. ### Claim 8 (depends on 1) The manufacturing method according to claim 1, further comprising: forming a bonding pad on the wirings of the pad region. ### Claim 9 A method for manufacturing a semiconductor device having a pad region and a circuit region, comprising: forming a low-k dielectric film on an entire surface of a substrate, the low-k dielectric film having dielectric constant of no more than 3; forming an opening in the low-k dielectric film of the pad region, including: forming a second insulating film on the low-k dielectric film; forming a resist pattern on the second insulating film; and patterning the second insulating film and the low-k dielectric film using the resist pattern as mask; forming a first insulating film having higher strength than the low-k dielectric film in the opening, wherein the first insulating film has a surface further from the substrate than a surface of the low-k dielectric film and is closer to the substrate than a surface of the resist pattern; and forming wirings on the first insulating film of the pad region and on the low-k dielectric film of the circuit region using a damascene process. ### Claim 10 (depends on 1) The manufacturing method according to claim 1, wherein forming the first insulating film having the higher strength than the low-k dielectric film in the opening comprises forming the first insulating film having a higher physical strength than the low-k dielectric film in the opening. ### Claim 11 (depends on 10) The manufacturing method according to claim 10, wherein forming the first insulating film having the higher physical strength than the low-k dielectric film in the opening comprises forming the first insulating film having a higher impact resistance than the low-k dielectric film in the opening. ### Claim 12 A method for manufacturing a semiconductor device having a pad region and a circuit region, comprising: forming a low-k dielectric film on an entire surface of a substrate, the low-k dielectric film having dielectric constant of no more than 3; forming an opening in the low-k dielectric film of the pad region, wherein forming the opening in the low-k dielectric film of the pad region includes: forming a second insulating film on the low-k dielectric film; forming a resist pattern on the second insulating film; and patterning the second insulating film and the low-k dielectric film using the resist pattern as mask; forming a first insulating film having higher strength than the low-k dielectric film in the opening; removing the resist pattern after forming the first insulating film in the opening; and forming wirings on the first insulating film of the pad region and on the low-k dielectric film of the circuit region using a damascene process. ### Claim 13 (depends on 12) The manufacturing method according to claim 12, further comprising removing the second insulating film after removing the resist pattern. ### Claim 14 (depends on 12) The manufacturing method according to claim 12, wherein forming the first insulating film in the opening comprises forming the first insulating film without forming the first insulating film on the resist pattern.