# US 7,410,833 B2 · Interconnections for flip-chip using lead-free solders and having reaction barrier layers

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- Number: US 7,410,833 B2
- Document ID: US7410833B2
- Status: Granted
- Kind: B2
- Application number: 10/815,103
- Filed: 2004-03-31
- Published: 2005-10-13
- Granted: 2008-08-12
- Earliest claimed: 2004-03-31
- Assignees: International Business Machines Corporation
- Inventors: Keith E. Fogel; Balaram Ghosal; Sung K. Kang; Stephen Kilpatrick; Paul A. Lauro; Henry A. Nye, III; Da-Yuan Shih; Donna S. Zupanski-Nielsen
- Web page: https://patentgrep.com/patent/US7410833B2

## CPC

- H10W 72/90: Bond pads, in general
- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/019: {of bond pads}
- H10W 72/01255: {by using masks}
- H10W 72/01257: {by reflowing}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/251: {Materials}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

## Claims

### Claim 1

A method for forming an interconnection structure suitable for flip-chip attachment of microelectronic device chips to chip carriers, comprising:
depositing an adhesion layer on a wafer or substrate serving as said chip carrier;
depositing a solder reaction barrier layer on said adhesion layer;
depositing a solder wettable layer on said reaction barrier layer, said solder wettable layer containing Cu;
depositing a lead free solder on said solder wettable layer, said lead free solder being substantially binary Sn—Ag; and
reflowing said solder so that said solder wettable layer diffuses into said lead free solder;
wherein said Cu of said solder wettable layer diffuses into said solder, and a ternary Sn—Ag—Cu lead-free solder is formed during reflowing.

### Claim 2 (depends on 1)

A method as recited in claim 1, wherein said reaction barrier layer is comprised of a material selected from the group consisting of Ti, TiN, Ta, TaN, Zr, ZnN, V, W and Ni.

### Claim 3 (depends on 1)

A method as recited in claim 1, wherein said adhesion layer is deposited by sputtering, plating or evaporating.

### Claim 4 (depends on 1)

A method as recited in claim 1, wherein said adhesion layer is deposited so as to have a thickness of about 100 to about 4000 Angstroms.

### Claim 5 (depends on 1)

A method as recited in claim 1, wherein said reaction barrier layer is deposited by sputtering, plating or evaporation.

### Claim 6 (depends on 5)

A method as recited in claim 5, wherein said reaction barrier layer is deposited so as to have a thickness of about 100 to about 20,000 angstroms.

### Claim 7 (depends on 1)

A method as recited in claim 1, wherein said solder wettable layer is deposited by sputtering, plating or evaporation.

### Claim 8 (depends on 1)

A method as recited in claim 1, wherein said solder wettable layer is deposited so as to have a thickness of about 100 to about 20,000 angstroms.

### Claim 9 (depends on 1)

A method as recited in claim 1, further comprising depositing a layer comprising Au or Sn on said solder wettable layer.

### Claim 10 (depends on 9)

A method as recited in claim 9, wherein the layer deposited on said solder wettable layer has a thickness of between substantially 100 to substantially 20,000 angstroms.

### Claim 11 (depends on 9)

A method as recited in claim 9, wherein the layer deposited on said solder wettable layer is deposited by one of sputtering, electro- or electroless plating or evaporation.

### Claim 12 (depends on 1)

A method as recited in claim 1, wherein a eutectic solder is formed.

### Claim 13 (depends on 1)

A method as recited in claim 1, wherein a number of elements in said solder is increased by at least one element, by said diffusion.

### Claim 14 (depends on 1)

A method as recited in claim 1, further comprising annealing at 150-250 degrees C. for 30 to 60 minutes.

### Claim 15 (depends on 1)

A method as recited in claim 1, wherein the lead free solder contains greater than 90% by weight Sn.

### Claim 16 (depends on 1)

A method as recited in claim 1, wherein the lead free solder contains one or more alloying components selected from the group consisting of Cu, Zn, Ag, Bi and Sb, whereby the lead-free solder substantially avoids alpha particle emission and induced soft logic errors which result therefrom.

### Claim 17 (depends on 1)

A method as recited in claim 1, wherein the solder wettable layer is a Cu layer having a thickness of 1-6 microns.

### Claim 18

A method for forming an interconnection structure suitable for flip-chip attachment of microelectronic device chips to chip carriers, comprising:
depositing an adhesion layer on a wafer or substrate serving as said chip carrier;
depositing a solder reaction barrier layer on said adhesion layer;
depositing a solder wettable layer on said reaction barrier layer, said solder wettable layer containing Cu;
depositing a lead free solder on said solder wettable layer, said lead free solder being substantially pure Sn; and
reflowing said solder so that said solder wettable layer diffuses into said lead free solder;
wherein said Cu of said solder wettable layer diffuses into said solder, and a binary Sn—Cu eutectic leadfree solder is formed during reflowing.
