# US 7,407,819 B2 · Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric

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- Number: US 7,407,819 B2
- Document ID: US7407819B2
- Status: Granted
- Kind: B2
- Application number: 11/436,209
- Filed: 2006-05-17
- Published: 2006-09-21
- Granted: 2008-08-05
- Earliest claimed: 2003-08-25
- Assignees: Intel Corporation
- Inventors: Mark S. Isenberger
- Web page: https://patentgrep.com/patent/US7407819B2

## CPC

- G11C 11/22: using ferroelectric elements
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a first distance from one another, and the bit lines have center lines spaced by a second distance from one another, the second distance being less than the first distance. Three masking steps are required to manufacture the three layers of lines. Older-technology machinery and masks are used to form the two layers of word lines, and new-technology machinery and masks are used to manufacture the bit lines.

## Claims

### Claim 1

A method of manufacturing a polymer memory, comprising:
(i) forming a first plurality of conductive word lines extending parallel to one another in a y-direction and having center lines spaced from one another by a first distance in an x-direction;
(ii) forming a first ferroelectric polymer memory material in x- and y-directions over the word lines;
(iii) forming a plurality of conductive bit lines extending parallel to one another in the x-direction over the first ferroelectric polymer memory material and having center lines spaced from one another by a second distance in the y-direction, the second distance being less than the first distance, adjacent ones of the bit lines spaced from one another by a spacing that is approximately half the second distance, a first array of polymer memory cells being defined in the first ferroelectric polymer memory material, each where a respective bit line crosses over a respective one of the first plurality of word lines, such that the ferroelectric polymer memory material at a respective cell of the first array is changed when a select voltage difference is applied over respective word and bit lines on opposing sides of the respective cell.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
(iv) forming a second ferroelectric polymer memory material in x- and y-directions over the bit lines; and
(v) forming a second plurality of conductive word lines extending parallel to one another in the y-direction over the second ferroelectric polymer memory material and having center lines spaced from one another by a third distance, equal to the first distance, in the x-direction, a second array of polymer memory cells being defined in the second ferroelectric polymer memory material, each where a respective one of the second plurality of word lines crosses over a respective bit line, such that the ferroelectric polymer memory material at a respective cell of the respective second array is changed when a select voltage difference is applied over respective bit and word lines opposing the respective cell.

### Claim 3 (depends on 2)

The method of claim 2, wherein (i)-(v) form at least part of a multi-layer structure, further comprising:
(vi) forming an insulating layer over the second plurality of word lines; and
(vii) repeating (i)-(v) on the insulating layer.

### Claim 4 (depends on 2)

The method of claim 2, wherein each word line has a first width in the x-direction and each bit line has a second width in the y-direction, the second width being less than the first width.

### Claim 5 (depends on 4)

The method of claim 4, wherein adjacent ones of the word lines are spaced from one another by a first spacing in the x-direction and adjacent ones of the bit lines are spaced from one another by a second spacing in the y-direction, the first spacing being more than the second spacing.