Scan chain partition for reducing power in shift mode
AssigneeLSI Corporation
InventorIain R. Clark
Life of this patent
Estimating the term…
Abstract
A scan chain partition includes a serial input coupled to a scan input signal pin of a module under test. A plurality of scan sub-chains is coupled to the serial input. A scan sub-chain output multiplexer is coupled to the plurality of scan sub-chains for sequentially selecting only one of the scan sub-chains in response to a scan sub-chain control signal. A scan sub-chain controller generates the scan sub-chain control signal and gates a scan clock signal to only a scan clock input of the selected scan sub-chain.
Claims16
A scan chain partition comprising:
- a serial input coupled to a scan input signal pin of a module under test;
- a plurality of scan sub-chains coupled to the serial input;
- a scan sub-chain controller coupled to the plurality of scan sub-chains for selecting only one of the scan sub-chains and for gating only one of a plurality of scan clock pulses to a scan clock input of only the selected scan sub-chain;
- and
- a scan sub-chain input multiplexer for connecting a scan shift input of each of the scan sub-chains either to a scan shift output of another one of the scan sub-chains or to the serial input.
A scan chain partition comprising:
- a serial input coupled to a scan input signal pin of a module under test;
- a plurality of scan sub-chains coupled to the serial input;
- a scan sub-chain controller coupled to the plurality of scan sub-chains for selecting only one of the scan sub-chains and for gating only one of a plurality of scan clock pulses to a scan clock input of only the selected scan sub-chain;
- a shift register having a serial shift input coupled to the serial input and parallel outputs for coupling respectively to a shift input of each of the scan sub-chains;
- and
- a scan sub-chain input multiplexer for connecting a scan shift input of each of the scan sub-chains either to a scan shift output of another one of the scan sub-chains or to one of the parallel outputs of the shift register.
A method comprising steps of:
- (a) receiving a serial input signal from a scan input signal pin of a module under test;
- (b) coupling the serial input signal to a scan shift input of each of a plurality of scan sub-chains;
- (c) generating a scan sub-chain control signal for selecting only one of the scan sub-chains;
- (d) gating only one of a plurality of scan clock pulses to a scan clock input of the selected scan sub-chain;
- and
- (e) connecting a scan shift input of each of the scan sub-chains either to a scan shift output of another one of the scan sub-chains or to the serial input.
A method comprising steps of:
- (a) receiving a serial input signal from a scan input signal pin of a module under test;
- (b) coupling the serial input signal to a scan shift input of each of a plurality of scan sub-chains;
- (c) generating a scan sub-chain control signal for selecting only one of the scan sub-chains;
- (d) gating only one of a plurality of scan clock pulses to a scan clock input of the selected scan sub-chain;
- (e) shifting the serial input through a shift register for coupling parallel outputs of the shift register respectively to a shift input of each of the scan sub-chains;
- and
- (f) connecting a scan shift input of each of the scan sub-chains either to a scan shift output of a previous scan sub-chain or to one of the parallel outputs of the shift register.
A scan chain partition comprising:
- a serial input coupled to a scan input signal pin of a module under test;
- a plurality of scan sub-chains coupled to the serial input;
- a scan sub-chain controller coupled to the plurality of scan sub-chains, the scan sub-chain controller for selecting only one of the scan sub-chains while only two scan clock pulses are gated to a scan clock input of only the selected scan sub-chain.
A scan chain partition comprising:
- a serial input coupled to a scan input signal pin of a module under test;
- a plurality of scan sub-chains coupled to the serial input;
- a scan sub-chain controller coupled to the plurality of scan sub-chains for selecting only one of the scan sub-chains and for gating only two of a plurality of scan clock pulses to a scan clock input of only the selected scan sub-chain;
- and
- a scan sub-chain input multiplexer for connecting a scan shift input of each of the scan sub-chains either to a scan shift output of another one of the scan sub-chains or to the serial input.
A scan chain partition comprising:
- a serial input coupled to a scan input signal pin of a module under test;
- a plurality of scan sub-chains coupled to the serial input;
- a scan sub-chain controller coupled to the plurality of scan sub-chains for selecting only one of the scan sub-chains and for gating only two of a plurality of scan clock pulses to a scan clock input of only the selected scan sub-chain;
- a shift register having a serial shift input coupled to the serial input and parallel outputs for coupling respectively to a shift input of each of the scan sub-chains;
- and
- a scan sub-chain input multiplexer for connecting a scan shift input of each of the scan sub-chains either to a scan shift output of another one of the scan sub-chains or to one of the parallel outputs of the shift register.
A method comprising steps of:
- (a) receiving a serial input signal from a scan input signal pin of a module under test;
- (b) coupling the serial input signal to a scan shift input of each of a plurality of scan sub-chains;
- and
- (c) generating a scan sub-chain control signal that selects only one of the scan sub-chains while only two scan clock pulses are gated to a scan clock input of the selected scan sub-chain.
A method comprising steps of:
- (a) receiving a serial input signal from a scan input signal pin of a module under test;
- (b) coupling the serial input signal to a scan shift input of each of a plurality of scan sub-chains;
- (c) generating a scan sub-chain control signal for selecting only one of the scan sub-chain;
- and
- (d) gating only two of a plurality of scan clock pulses to a scan clock input of the selected scan sub-chain;
- and
- (e) connecting a scan shift input of each of the scan sub-chains either to a scan shift output of another one of the scan sub-chains or to the serial input.
A method comprising steps of:
- (a) receiving a serial input signal from a scan input signal pin of a module under test;
- (b) coupling the serial input signal to a scan shift input of each of a plurality of scan sub-chains;
- (c) generating a scan sub-chain control signal for selecting only one of the scan sub-chains;
- (d) gating only two of a plurality of scan clock pulses to a scan clock input of the selected scan sub-chain;
- (e) shifting the serial input through a shift register in step (b) for coupling parallel outputs of the shift register respectively to a shift input of each of the scan sub-chains;
- and
- (f) connecting a scan shift input of each of the scan sub-chains either to a scan shift output of a previous scan sub-chain or to one of the parallel outputs of the shift register.
Dependencies are inferred from the claim text.