Method and system for renaming registers in a microprocessor

A system for renaming registers, comprising:

• a plurality of unique physical registers;
• a mapping table operable to map a logical register associated with an instruction to a selected one of the plurality of unique physical registers, the selected unique physical register operable to receive a result in response to execution of the instruction;
• an active list operable to maintain condition codes associated with the instruction;
• a floating point status register operable to receive the result from the selected unique physical register prior to graduation of the instruction;
• wherein the mapping table includes an indication that the result is in the floating point status register after the instruction graduates or in the selected unique physical register while the instruction is still valid, the mapping table operable to return an identity of the selected one of the plurality of unique physical registers after moving the result to the floating point status register for future selection upon graduation of the instruction in order to maintain a fixed order for selection of unique physical registers.

A system for renaming registers, comprising:

• means for receiving an instruction for execution;
• means for decoding the instruction;
• means for placing the instruction in an active list;
• means for mapping a logical register associated with the instruction to a selected unique physical register;
• means for executing the instruction to obtain a result;
• means for placing the result in the selected unique physical register;
• means for moving the result to a floating point status register prior to graduation of the instruction;
• means for returning an identity of the selected unique physical register after moving the result to the floating point status register for future selection upon graduation of the instruction in order to maintain a fixed order for selection of unique physical registers;
• means for providing an indication in the mapping that the result is in the selected unique physical register while the instruction is still valid or in the floating point status register after the instruction graduates.