Multi-processor systems and methods for backup for non-coherent speculative fills

A system comprising:

• a plurality of processor nodes in communication with each other;
• wherein one of the plurality of processor nodes comprises a source processor node comprising:
• a processor pipeline that executes program instructions with a given speculative data fill of at least two speculative data fills received from two or more other processor nodes of the plurality of processor nodes in response to a source request for a data fill associated with a cache line issued by the source processor node in response to a cache miss, wherein the at least two speculative data fills are copies of the requested data fill that have undetermined coherency states;
• and
• a backup system that retains processor pipeline state information related to the source request;
• and
• the system employing a coherency protocol that causes the system to provide a coherent signal employed by the source processor to determine if the given speculative data fill is coherent, wherein the backup system returns the processor pipeline to a previous processor execution state if it is determined that the given speculative data fill is not coherent.

A multi-processor system that conforms to a coherency protocol and employs speculative data fills, the system comprising:

• a source processor that transmits a source request for a data fill associated with a cache line in response to a cache miss, the source processor receiving at least two speculative data fills from two or more other processors of the multiprocessor system, the source processor generating a miss address file (MAF) entry associated with the source request, the MAF entry comprising:
• a field that identifies an address of a cache line associated with the source request;
• and
• at least one field that contains backup information that can be employed to return the source processor to a previous processor execution state if a given speculative data fill of the at least two speculative data fills employed by the source processor is determined to be non-coherent, wherein the speculative data fills are copies of the requested data fill that have undetermined coherency states.

A multi-processor system that employs a cache coherency protocol, the system comprising:

• means for providing at least two speculative data fills to a source processor from two or more other processors of the multi-processor system in response to a source request for a data fill associated with a cache line issued by the source processor in response to a cache miss, wherein the at least two speculative data fills are copies of the requested data fill and have undetermined coherency states;
• means for retaining backup information corresponding to a processor execution state at a first user program instruction, the first user program instruction corresponds to a first program instruction that employs a given speculative data fill of the at least two speculative data fills associated with the source request;
• means for executing program instructions associated with the source processor employing the given speculative data fill;
• and
• means for returning the processor execution to a processor execution state at the first user program instruction, if it is determined that the given speculative data fill contains non-coherent data.

A method of executing program instructions employing a speculative fill in a multi-processor system that conforms to a coherency protocol, the method comprising:

• executing program instructions with data from a given speculative fill of at least two speculative fills that are provided to a processor from one or more other processors of the multi-processor system in response to a source request for a data fill associated with a cache line issued by the processor in response to a cache miss, wherein the at least two speculative fills are copies of a requested data fill that have undetermined coherency states;
• storing information corresponding to a processor execution state associated with the given speculative fill;
• and
• backing the processor to the processor execution state based on the stored information, if data from the given speculative fill that is employed by the processor is determined to be non-coherent.