Data coding system and method
OwnerMadian Somasundaraminventor
Life of this patent
Estimating the term…
Abstract
A data coding system that compresses data and enables data, e.g., prefix addresses, to be represented with significantly fewer memory cells when compared to conventional coding systems.
Claims20
A data coding method comprising the steps of:
- appending an extra bit to a data entry;
- setting the extra bit to a first value responsive to a bit immediately preceding the extra bit being a don't care bit;
- setting the extra bit to a second value responsive to the bit immediately preceding the extra bit not being a don't care bit, wherein the second value is distinct from the first value;
- for each don't care bit in the data entry, setting the don't care bit to the first value responsive to a bit immediately preceding the don't care bit also being a don't care bit;
- and
- for each don't care bit in the data entry, setting the don't care bit to the second value responsive to the bit immediately preceding the don't care bit not being a don't care bit.
A method for decoding an encoded data entry to produce a decoded data entry, the method comprising the steps of:
- receiving the encoded data entry having a first encoded bit at a first bit position and a second encoded bit at a second bit position, the second bit position immediately following the first bit position;
- responsive to the second encoded bit having a first value, indicating that a bit in the decoded data entry at the first bit position is a don't care bit;
- and
- responsive to the second encoded bit having a second value, indicating that the bit in the decoded data entry at the first bit position has a value equivalent to the first encoded bit.
A computer program product for coding data, the computer program product stored on a computer-readable storage medium and including instructions that when executed cause a processor to carry out the steps of:
- appending an extra bit to a data entry;
- setting the extra bit to a first value responsive to a bit immediately preceding the extra bit being a don't care bit;
- setting the extra bit to a second value responsive to the bit immediately preceding the extra bit not being a don't care bit, wherein the second value is distinct from the first value;
- for each don't care bit in the data entry, setting the don't care bit to the first value responsive to a bit immediately preceding the don't care bit also being a don't care bit;
- and
- for each don't care bit in the data entry, setting the don't care bit to the second value responsive to the bit immediately preceding the don't care bit not being a don't care bit.
A computer program product for decoding an encoded data entry to produce a decoded data entry, the computer program product stored on a computer-readable storage medium and including instructions that when executed cause a processor to carry out the steps of:
- receiving the encoded data entry having a first encoded bit at a first bit position and a second encoded bit at a second bit position, the second bit position immediately following the first bit position;
- responsive to the second encoded bit having a first value, indicating that a bit in the decoded data entry at the first bit position is a don't care bit;
- and
- responsive to the second encoded bit having a second value, indicating that the bit in the decoded data entry at the first bit position has a value equivalent to the first encoded bit.
A system for decoding an encoded data entry to produce a decoded data entry, the system comprising:
- a specification memory storing the encoded data entry having a first encoded bit at a first bit position and a second encoded bit at a second bit position, the second bit position immediately following the first bit position;
- and
- an interpretation circuit coupled to the specification memory, the interpretation circuit receiving the encoded data entry and responsive to the second encoded bit having a first value, indicating that a bit in the decoded data entry at the first bit position is a don't care bit, and responsive to the second encoded bit having a second value, indicating that the bit in the decoded data entry at the first bit position has a value equivalent to the first encoded bit.
Dependencies are inferred from the claim text.