US 7,406,406 B2Granted

Instructions to load and store containing words in a computer system emulator with host word size larger than that of emulated machine

AssigneeBull HN Information Systems Inc.

InventorsRussell W. Guenthner, Sidney L. Andress, John E. Heath

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Abstract

Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

Claims15

Dependent claims

In a data processing system in which a structure and operation of a target system, which includes accumulator and supplementary accumulator registers, is emulated on a host system and in which a word length of the target system is shorter than, but more than half, a word length of the host system, a process for providing, during an emulation process, visibility in the emulated accumulator and supplementary accumulator registers of a target system word stored in the host system memory, the process comprising the steps of:

A) in response to a first target system instruction to be executed during the emulation of a target system program by the host system, which first instruction includes an opcode specifying a first now functionality for reading entire content of an identified full word from the host system memory, and for providing the entire content of the identified full word to the target system program by:
1) identifying a first storage location in the host memory system, and
2) loading the lower order contents of the first storage location into the emulated supplementary accumulator register;
and
3) loading the remaining contents of the first storage location into the least significant bits of the emulated accumulator register;
and
B) in response to a second target system instruction to be executed during the emulation of a target system program by the host system, which second instruction includes an opcode specifying a second new functionality provided to the target system program for writing into an identified full word of the host system memory by:
1) identifying a second storage location in the host memory system, and
2) storing the contents of the emulated supplementary accumulator register into the least significant bits of the identified second storage location;
and
3) storing the least significant bits the accumulator register into the most significant bits of the identified second storage location so as to fill all bits of the full word in host system memory at the identified second storage location.

8 more elements

In a data processing system in which a structure and operation of a target system, which includes first and second general registers, is emulated on a host system and in which a word length of the target system is shorter than a word length of the host system, a process for providing, during an emulation process, visibility in the first and second general purpose registers of a target system word stored in the host system memory, the process comprising the steps of:

A) in response to a first target system instruction to be executed during the emulation of a target system program by the host system, which first instruction includes an opcode specifying a first new functionality for reading entire content of an identified full word from the host system memory, and for providing the entire content of the identified full word to the target system program by:
1) identifying a first storage location in the host memory system, and
2) loading the lower order contents of the first storage location into the emulated first general purpose register of the emulated system;
and
3) loading the remaining, upper order, contents of the first storage location into the least significant bits of the emulated second general purpose register;
and
B) in response to a second instruction to be executed during the emulation of a target system program by the host system, which second instruction includes an opcode specifying a second new functionality provided to the target system program for writing into an identified full word of the host system memory by:
1) identifying a second storage location in the host memory system, and
2) storing the contents of the emulated first general purpose register into the least significant bits of the identified second storage location;
and
3) storing the least significant bits of the second general purpose register into the most significant bits of the identified second storage location so as to fill all bits of the full word in host system memory at the identified second storage location.

8 more elements

Dependencies are inferred from the claim text.