Integrated circuit for code acquisition
AssigneeSTMicroelectronics S.r.l.
InventorsPhilip Mattos, Marco Losi
Life of this patent
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Abstract
A semiconductor integrated circuit for processing a plurality of received broadcast signals, such as GPS signals, is operable in two modes: acquisition and tracking. In an acquisition mode, sample reducer combines samples of a received signal for correlation with a locally generated version of a GPS code. In a tracking mode, the sampled signal is provided direct to the correlators without sample reduction. The same correlators are thereby used to increase acquisition speed.
Claims27
A semiconductor integrated circuit for processing a plurality of received broadcast signals, the broadcast signals being of a type each having a different respective digital code, the semiconductor integrated circuit comprising:
- a digital sampler;
- a sample reducer;
- and
- a plurality of correlators being arranged to be operable in two modes wherein:
- in an acquisition mode:
- the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at a first bit rate;
- the sample reducer is adapted to reduce bits of the digital bit stream by combining groups of N bits together to produce a reduced digital bit stream;
- the plurality of correlators is adapted to receive the reduced digital bit stream at a second bit rate, being higher than the first bit rate, and each of the plurality of correlators is adapted to correlate the reduced digital bit stream with a same locally generated version of one of the different digital codes;
- and
- in a track mode:
- the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at the first bit rate and to provide the digital bit stream direct to each of the plurality of correlators, each correlator is adapted to correlate the digital bit stream with a different locally generated version of one of the digital codes,
- wherein for the acquisition mode, the sample reducer includes an adder to add the groups of N bits,
- wherein in the acquisition mode, the adder is adapted to provide a digital output representative of a value of a sum of the N bits, and
- wherein in the acquisition mode, the adder is adapted to provide an output having a first logic state if the sum of the N bits is greater than a given value and an output having a second logic state opposite to said first logic state if the sum of N bits is less than the given value.
A method of processing a plurality of received broadcast signals each having a different respective digital code, the method comprising:
- sampling the received broadcast signals to produce a digital bit stream at a first bit rate;
- reducing bits of the digital bit stream by combining groups of N bits to produce a reduced bit stream;
- correlating the reduced digital bit stream at a second bit rate using a plurality of correlators each correlating the reduced digital bit stream with a same one of a locally generated version of the digital codes to acquire the broadcast signals;
- and
- subsequently correlating the digital bit stream at the first bit rate using the plurality of correlators each correlating the digital bit stream with a locally generated version of a different one of the digital codes to track the previously acquired signals,
- wherein the reducing the bits of the digital bit stream includes summing groups of N bits,
- wherein the summing produces a digital output representative of the sum, and
- wherein the summing produces a first logic state if the sum of N bits is greater than a given value and a second logic state opposite to said first logic state if the sum is less than the given value.
An apparatus to process a plurality of received broadcast signals having digital codes, the apparatus comprising:
- a sampler unit to sample the received broadcast signals to produce a digital bit stream at a first bit rate in an acquisition mode;
- a reducer unit coupled to the sampler unit to reduce a number of bits of the digital bit stream via combination of groups of N bits together to produce a reduced digital bit stream in the acquisition mode;
- and
- a correlator unit coupled to the reducer unit to receive the reduced digital bit stream at a second bit rate and to correlate the reduced digital bit stream with one of the digital codes in the acquisition mode, and wherein the sampler unit is coupled to the correlator unit to directly provide the digital bit stream at the first bit rate to the correlator unit in a track mode and further wherein the correlator unit is adapted to correlate that digital bit stream with a different one of the digital codes in the track mode,
- wherein the reducer unit includes an adder to add the groups of N bits in the acquisition mode to obtain a sum, and wherein further in the acquisition mode:
- the adder is coupled to provide a digital output representative of the sum;
- the adder is coupled to provide a first binary value if the sum is greater than a given value and a second binary value if the sum is less than the given value;
- and
- the adder is coupled to alternately provide the first binary value and the second binary value if the sum is equal to the given value.
A system to process a plurality of received broadcast signals having digital codes, the system comprising:
- means for sampling the received broadcast signals to produce a digital bit stream at a first bit rate;
- means for reducing a number of bits of the digital bit stream by combining groups of N bits to produce a reduced digital bit stream;
- and
- means for correlating the reduced digital bit stream with one of the digital codes to acquire the broadcast signals, and for correlating the digital bit stream at the first bit rate with a different one of the digital codes to track the acquired broadcast signals,
- wherein the means for reducing the number of bits of the digital bit stream by combining groups of N bits includes means for summing the groups of N bits to obtain a sum, the means for summing including:
- means for providing a first binary value if the sum is greater than a given value and a second binary value if the sum is less than the given value;
- and
- means for alternately providing the first binary value and the second binary value if the sum is equal to the given value.
Dependencies are inferred from the claim text.