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US 7,405,968 B2Granted
Non-volatile memory cell using high-K material and inter-gate programming
AssigneeSanDisk Corporation
InventorsNima Mokhlesi, Jeffrey W. Lutze
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Abstract
A non-volatile memory device has a channel region between source/drain regions, a floating gate, a control gate, a first dielectric region between the channel region and the floating gate, and a second dielectric region between the floating gate and the control gate. The first dielectric region includes a high-K material. The non-volatile memory device is programmed and/or erased by transferring charge between the floating gate and the control gate via the second dielectric region.
Claims44
A non-volatile storage device, comprising:
- source/drain regions;
- a channel region between said source/drain regions;
- a floating gate;
- a control gate;
- a first dielectric region between said channel region and said floating gate, said first dielectric region includes a high-K material;
- and
- a second dielectric region between said floating gate and said control gate, wherein charge is tunneled in both directions between said floating gate and said control gate via said second dielectric region while said control gate receives a non-negative voltage;
- said source/drain regions, said channel region, said floating gate, said control gate, said first dielectric region and said second dielectric region form a NAND device.
5 more elements
A non-volatile storage device, comprising:
- a NAND flash memory device comprising:
- N+ diffusion source/drain regions formed in a p-well,
- a channel region in said p-well between said N+ diffusion source/drain regions,
- a floating gate,
- a control gate,
- a first dielectric region between said channel region and said floating gate, said first dielectric region includes a high-K material, and
- a second dielectric region between said floating gate and said control gate, said non-volatile storage device changes its programming condition by transferring a same type of charge in opposite directions between said floating gate and said control gate via said second dielectric region while a non-negative voltage is applied to said control gate.
4 more elements
A non-volatile storage device, comprising:
- N+ diffusion source/drain regions formed in a p-well;
- a channel region in said p-well between said N + diffusion source/drain regions;
- a floating gate;
- a control gate;
- a first dielectric region between said channel region and said floating gate, said first dielectric region includes a high-K material;
- a second dielectric region between said floating gate and said control gate, said non-volatile storage device changes its programming condition by transferring a same type of charge in opposite directions between said floating gate and said control gate via said second dielectric region while a non-negative voltage is applied to said control gate;
- said N+ diffusion source/drain regions, said channel region, said floating gate, said control gate, said first dielectric region and said second dielectric region form a NAND flash memory device.
4 more elements
A non-volatile storage device, comprising:
- a NAND device comprising:
- a p-well;
- N+ diffusion source/drain regions formed in said p-well,
- a channel region in said p-well between said N + diffusion source/drain regions,
- a floating gate,
- a control gate,
- a first dielectric region between said channel region and said floating gate, said first dielectric region includes a high-K material, and
- a second dielectric region between said floating gate and said control gate;
- and
- a control circuit, said control circuit changes said NAND device's programming condition by transferring a same type of charge in opposite directions between said floating gate and said control gate via said second dielectric region while said control circuit causes a non-negative voltage to be applied to said control gate.
7 more elements
A method for operating non-volatile storage, comprising:
- applying a voltage to a substrate for a NAND flash memory element, said voltage is greater than zero volts, said substrate being separated from a floating gate of said NAND flash memory element by a first dielectric region of said NAND flash memory element that includes a high-K material;
- applying a non-negative voltage to a control gate of said NAND flash memory element;
- and
- tunneling electrons from said control gate to said floating gate across a second dielectric region of said NAND flash memory element while applying said non-negative voltage to said control gate, said second dielectric region is positioned between said control gate and said floating gate.
1 more element
A method for operating non-volatile storage, comprising:
- applying a non-negative voltage to a control gate of a NAND flash memory element;
- transferring a first type of charge from said control gate to a floating gate of said NAND flash memory element while applying said non-negative voltage to said control gate;
- and
- transferring said first type of charge from said floating gate to said control.
1 more element
A non-volatile storage device, comprising:
- N+ diffusion source/drain regions;
- a channel region between said N + diffusion source/drain regions;
- a floating gate;
- a control gate;
- a first dielectric region between said channel region and said floating gate, said first dielectric region includes a high-K material;
- and
- a second dielectric region between said floating gate and said control gate, electrons are transferred from said control gate to said floating gate via said second dielectric region while said control gate receives a non-negative voltage:
- said N+ diffusion source/drain regions, said channel region, said floating gate, said control gate, said first dielectric region and said second dielectric region form a NAND device.
5 more elements
Dependencies are inferred from the claim text.