Signal selecting circuit and recording medium having program recorded thereon

A recording medium having a program recorded thereon, the program causing a processor of a signal selecting circuit which includes

• the processor that performs control for outputting a first and a second digital signals by convening a first and a second analog signals into digital signals, the first and the second analog signals being the same or different signals selected from a plurality of analog signals,
• an analog signal selection circuit that, based on an analog selection signal, selects the first and the second analog signals from the plurality of analog signals,
• a first AD converter that converts the first analog signal outputted from the analog signal selection circuit into a third digital signal to output the third digital signal,
• a second AD converter that converts the second analog signal outputted from the analog signal selection circuit into a fourth digital signal to output the fourth digital signal,
• a digital signal selection circuit that, based on a digital selection signal, selectively outputs one or both of the third and the fourth digital signals as the first and the second digital signals, and
• a memory that stores a state of selection of the third and the fourth digital signals in the digital signal selection circuit,
• to execute the steps of:
• accepting an output selection signal for selecting the first and the second digital signals;
• outputting the analog selection signal and the digital selection signal based on the output selection signal accepted and on the state of selection stored in the memory;
• updating the state of selection stored in the memory;
• and
• when accepting the output selection signal for changing the second digital signal to the same signal as the first digital signal, in a state where the third digital signal is outputted as the first digital signal and where the fourth digital signal is outputted as the second digital signal, outputting the digital selection signal for outputting the third digital signal as the first and the second digital signals;
• and updating the state of selection stored in the memory.