US 7,405,615 B2Granted

Method of impulse acreage modulation digital power processing and its device

OwnerHutang Fang, Hua Fanginventors

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Abstract

The present invention relates to a method and apparatus of processing digital power with pulse area modulation. This apparatus is composed of a front end circuit (1), a double limit delay comparison circuit (2), an integrating circuit (7), a drive circuit (3), a switching circuit (4), a power source (5) and a filter circuit (6). The double limits of signal and feedback comparison signal will be compared in the double limit delay comparison circuit. When the value of feedback comparison signal is greater than the upper limit, the double limit delay comparison circuit will output a low level. When the value of feedback comparison signal is smaller than the lower limit, the double limit delay comparison circuit will output a high level. Integrating circuit samples from the output of main switching circuit, and then sends a feedback signal (Y) to the double limit delay comparison circuit. The feedback signal is the average output of actual pulse area, which is consistent with signal (S) and also overlaps fluctuate showing whether pulse exists or not and being related to pulse.

Claims9

Dependent claims

A method of processing digital power with pulse area modulation, wherein an input signal is used for controlling power conversion into amplified power output after the input signal is being passed through a front end circuit, a double limit delay comparison circuit, a drive circuit, a switching circuit and a filter circuit, and wherein an integrating circuit samples from an output of the switching circuit, and then outputs a feedback comparison signal to the double limit delay comparison circuit;

comprising the steps of:
preprocessing the input signal in the front end circuit;
comparing an output signal from the front end circuit with the feedback comparison signal in the double limit delay comparison circuit, and wherein when the value of the feedback comparison signal is greater than a predetermined upper limit, the double limit delay comparison circuit outputs a low level signal, while when the value of the feedback comparison signal is smaller than a predetermined lower limit different from the upper limit, the double limit delay comparison circuit outputs a high level signal;
controlling the drive circuit by the level output from the double limit delay comparison circuit;
converting power provided by the power source into an amplified pulse sequence by means of the switching circuit based on an output of the drive circuit;
filtering the amplified pulse sequence by the filter circuit and then outputting amplified power;
obtaining the feedback comparison signal by sampling from the output of the switching circuit by means of the integrating circuit.

4 more elements

An apparatus of processing digital power with pulse area modulation, comprising:

a front end circuit, a double limit delay comparison circuit, an integrating circuit, a drive circuit, a switching circuit, a power source and a filter circuit, wherein an input signal is input from an input of the front end circuit;
an output of the front end circuit is connected to an input of the double limit delay comparison circuit;
an output of the double limit delay comparison circuit is connected to an input of the drive circuit;
an output of the drive circuit is connected to an input of the switching circuit;
an output of the switching circuit is outputted as amplified power after being passing through the filter circuit;
an input of the integrating circuit is connected to the output of switching circuit;
an output of the integrating circuit is connected to the double limit delay comparison circuit;
and wherein the power source supplies electric power to the switching circuit, and then the electric power is converted into an amplified pulse sequence with a signal spectrum in the switching circuit;
the amplified pulse sequence being filtered in the filter circuit to provide an output of the apparatus;
the integrating circuit sampling from the output of the switching circuit so as to obtain a feedback signal which provides an indication of an average of pulse area;
the feedback signal being sent to the double limit delay comparison circuit, said double limit delay comparison circuit having two different predetermined limit values.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/497,482Filed 3 Dec 2002
Priority: CN 01 1 397863 Dec 2001
Published: US 2005/0069049 A131 Mar 2005
Granted: 29 Jul 2008
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H03K 7/08
Modulating pulses with a continuously-variable modulating signal: duration or width modulation ; Duty cycle modulation
H03F 3/217
With semiconductor devices only: class D power amplifiers; Switching amplifiers
H03F 3/2175
Class D power amplifiers; Switching amplifiers: using analogue-digital or digital-analogue conversion
H03K
Pulse technique