Device and data processing method employing the device

A device comprising:

• at least one variable logic gate array unit, wherein
• at least one said variable logic gate array unit comprises a mechanical element switch for switching a connection in the variable logic gate array unit,
• the mechanical element switch is designed to have two stable states or a bistable state,
• the variable logic gate array unit comprises a plurality of circuit blocks,
• the plurality of circuit blocks are arranged in a matrix and form cellular automata in which the adjacent circuit blocks are able to communicate with each other,
• at least one of the plural circuit blocks is an AUR,
• the AUR comprises an AND plane which performs a product operation;
• an OR plane which is electrically connected with the AND plane and performs an addition operation;
• a plurality of input gates connected to the AND plane;
• and output gates which are connected to the OR plane and provided in the same number with the input gates, and
• product and addition operations of the signals input from the plural input gates are performed, and the results of the product and addition operations are output from the output gates.

A device comprising:

• at least one variable logic gate array unit, wherein
• at least one said variable logic gate array unit comprises a mechanical element switch for switching a connection in the variable logic gate array unit,
• the mechanical element switch is designed to have two stable states or a bistable state,
• the variable logic gate array unit comprises at least one logic cell, at least one connection cell;
• and at least one switch cell, the logic cell, the connection cell, and the switch cell being arranged in a matrix,
• each of, at least one said logic cell, at least one said connection cell, and at least one said switch cell, is provided with the above described mechanical element switch,
• the logic function of the logic cell, including at least either one of NOR and NAND, is configured to be changeable by the mechanical element switch,
• the connections of the connection cell with a wiring and the corresponding, among plural logic cells, a logic cell, are configured to be changeable by the mechanical element switch, and
• the connection of the switch cell with the wiring is configured to be changeable by the mechanical element switch.

A device comprising:

• at least one variable logic gate array unit, wherein
• at least one said variable logic gate array unit comprises a mechanical element switch for switching a connection in the variable logic gate array unit,
• the mechanical element switch is designed to have two stable states or a bistable state,
• the variable logic gate array unit comprises at least one logic block, and an interconnection block electrically and mutually connected between the logic blocks,
• the mechanical element switch is provided in each of the logic blocks and the interconnection block,
• the logic function of the logic block including at least either one of a register and a computing unit is formed to be configurable by the mechanical element switch, and
• the interconnection of the interconnection block with the logic function which has been set in the logic block is configured to be switchable by the mechanical element switch.

A device comprising:

• a CPU;
• a bus electrically connected with the CPU;
• a variable logic gate array unit electrically connected with the bus and electrically connected with the CPU via the bus;
• and
• a writing permission circuit which is able to receive signals from outside, electrically connected to the variable logic gate array unit, and transmits signals regarding the permission of writing to the variable logic gate array unit based on the signals from outside, wherein
• the variable logic gate array unit comprises a mechanical element switch for switching the connection in the variable logic gate array unit, and
• the mechanical element switch is designed to have two stable states or a bistable state.

A device comprising:

• a CPU;
• a bus electrically connected with the CPU;
• a variable logic gate array unit electrically connected with the bus and electrically connected with the CPU via the bus;
• and
• a wireless interface circuit which is able to receive signals from outside and electrically connected with the variable logic gate array unit, wherein
• the variable logic gate array unit comprises a mechanical element switch for switching the connection in the variable logic gate array unit,
• the mechanical element switch is designed to have two stable states or a bistable state, and
• the connection in the variable logic gate array unit is changeable based on the signals from outside received via the wireless interface circuit.