Ball grid array package-to-board interconnect co-design apparatus
AssigneeAltera Corporation
InventorsYuming Tao, Jon M. Long, Anilkumar Raman Pannikkat
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Abstract
A package-board co-design methodology preserves the signal integrity of high-speed signals passing from semiconductor packages to application PCBs. An optimal architecture of interconnects between package and PCB enhances the signal propagation, minimizes parasitic levels, and decreases electromagnetic interference from adjacent high frequency signals. The invention results in devices with superior signal quality and EMI shielding properties with enhanced capability for carrying data stream at multiple-gigabit per second bit-rates.
Claims22
An integrated circuit apparatus, comprising:
- a ball grid array semiconductor package comprising a package substrate having an asymmetrical stripline as a signal routing trace, and a first reference plane for the asymmetrical stripline;
- a printed circuit board comprising a second reference plane for the asymmetrical stripline;
- wherein the ball grid array semiconductor package is mounted on the printed circuit board and the spacing between the asymmetrical stripline and the first reference plane is at least half as much as the spacing between the asymmetrical stripline and the second reference plane.
An integrated circuit apparatus, comprising:
- a ball grid array semiconductor package comprising a package substrate having a means for routing a signal, and a first reference means for the signal routing means;
- a printed circuit board comprising a second reference means for the signal routing means;
- means for mounting the ball grid array semiconductor package on the printed circuit board such that the signal routing means has a defined relationship to its referenced means in the package and the board to enhance signal transmission by reducing and controlling parasitic capacitance and impedance.
Dependencies are inferred from the claim text.