Semiconductor device having a low-resistance bus interconnect, method of manufacturing same, and display apparatus employing same
AssigneeNEC Corporation
InventorTamaki Toba
Life of this patent
Estimating the term…
Abstract
A semiconductor device for being mounted on the display panel board of a display apparatus includes a substrate; a plurality of circuit units disposed on the substrate and including thin-film transistors, the circuit units having respective output terminals; at least one bus interconnect for supplying a voltage to the circuit units; and a power supply feed point for supplying a voltage from an external source to the bus interconnect. The pitch L (m) of the circuit units, the number N of the circuit units, and the resistance R (Q/m) per unit length of the at least one bus interconnect are related to each other as follows: R×N2×L≦4×103.
Claims4
A method of manufacturing a semiconductor device, comprising the steps of:
- forming N circuit units including thin-film transistors at a pitch L (m), on a substrate;
- and
- forming output terminals of said circuit units and at least one bus interconnect for supplying a voltage to said circuit units, wherein the pitch L (m) of said circuit units, the number N of said circuit units, and a resistance R (Ω/m) per unit length of said at least one bus interconnect are related to each other as follows:
- R×N2×L≦4×103
- wherein said step of forming output terminals of said circuit units and at least one bus interconnect includes the step of simultaneously forming at least a portion of said bus interconnect and at least a portion of said output terminals.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming N circuit units including thin-film transistors at a pitch L (m), on a substrate;
- and
- forming output terminals of said circuit units and at least one bus interconnect for supplying a voltage to said circuit units, wherein the pitch L (m) of said circuit units, the number N of said circuit units, and a resistance R (Ω/m) per unit length of said at least one bus interconnect are related to each other as follows:
- R×N2×L≦16×103
- wherein said step of forming output terminals of said circuit units and at least one bus interconnect includes the step of simultaneously forming at least a portion of said bus interconnect and at least a portion of said output terminals.
Dependencies are inferred from the claim text.