Fabricating method of non-volatile memory

A fabricating method of a non-volatile memory, comprising:

• providing a substrate having a plurality of isolation structures extending in a first direction already formed in the substrate, the isolation structures protruding from the substrate, and a pad layer and a mask layer being disposed on the substrate between these isolation structures;
• forming a second mask layer on the substrate, covering these isolation structures and the first mask layer;
• patterning the second mask layer and the first mask layer to form a plurality of openings extending in a second direction, the openings exposing a portion of the surface of the pad layer and a portion of the surface of the isolation structures, wherein the first direction and the second direction are interlaced;
• removing the exposed pad layer;
• forming a tunneling dielectric layer on the substrate;
• forming a first conductive layer on the substrate;
• removing a portion of the first conductive layer by using the isolation structures as the etch-stopping layer and the first conductive layer being divided into blocks by the isolation structures, the second mask layer and the first mask layer;
• removing a portion of the top of the isolation structures;
• forming an inter-gate dielectric layer on the substrate, wherein the inter-gate dielectric layer covers the first conductive layer and the second mask layer;
• forming a second conductive layer on the inter-gate dielectric layer, the second conductive layer filling up the openings between the second mask layers;
• removing a portion of the second conductive layer by using the second mask layer as the stopping layer;
• removing the first mask layer and the second mask layer;
• and
• forming a plurality of doped regions in the substrate on both sides of the second conductive layer.