Semiconductor device and method of fabricating the same
AssigneeFujitsu Limited
InventorSatoshi Nakai
Life of this patent
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Abstract
The present invention provides a semiconductor device fabrication method including the steps of: forming first gate insulating films in first to third active regions of a silicon substrate; wet-etching the first gate insulating film of the second active region through a first resist opening portion of a first resist pattern; forming a second gate insulating film in the second active region; forming on the silicon substrate a second resist pattern having a second resist portion larger than the first resist opening portion; wet-etching the first gate insulating film of the third active region through a second resist opening portion of the second resist pattern; and forming a third gate insulating film in the third active region.
Claims9
A method of fabricating a semiconductor device, comprising the steps of:
- forming a device-isolation insulating film in a semiconductor substrate to isolate first to third active regions of the semiconductor substrate with the device-isolation insulating film;
- forming first gate insulating films on the semiconductor substrate in the first to third active regions, respectively;
- forming a first resist pattern on the device-isolation insulating film and the first gate insulating films, the first resist pattern having a first resist opening portion surrounding the second active region and a first resist portion covering the first and third active regions;
- removing the first gate insulating film of the second active region through the first resist opening portion by wet etching;
- removing the first resist pattern;
- forming a second gate insulating film on the semiconductor substrate in the second active region after removing the first resist pattern, the second gate insulating film being thinner than the first gate insulating film;
- forming a second resist pattern on the device-isolation insulating film and the first and second gate insulating films, the second resist pattern having a second resist opening portion surrounding the third active region and a second resist portion covering the first and second active regions and being larger than that of the first resist opening portion of the first resist pattern;
- removing the first gate insulating film of the third active region through the second resist opening portion by wet etching;
- removing the second resist pattern;
- forming a third gate insulating film on the semiconductor substrate in the third active region after removing the second resist pattern, the third gate insulating film being thinner than the second gate insulating film;
- forming first to third gate electrodes on the first to third gate insulating films, respectively;
- and
- forming first to third source/drain regions in the semiconductor substrate on both sides of the first to third gate electrodes, respectively.
Dependencies are inferred from the claim text.