Application of gate edge liner to maintain gate length CD in a replacement gate transistor flow

A method of forming a gate in a semiconductor device, said method comprising:

• providing a silicon substrate having a gate oxide thereon, poly-Si on the gate oxide, and a hard mask on the poly-Si;
• etching the hard mask and poly-Si to define a dummy gate structure which includes the gate oxide, poly-Si on the gate oxide, and a residual hard mask on the poly-Si;
• depositing a gate edge liner on a top of the residual hard mask and on sides of the residual mask, poly-Si and gate oxide;
• depositing a spacer liner over the gate edge liner;
• removing the spacer liner from over the gate edge liner and removing the gate edge liner from the top of the residual hard mask but leaving a portion of the spacer liner and the gate edge liner intact such that the spacer liner and the gate edge liner extend beyond the residual hard mask;
• filling areas apart from the dummy gate structure with a dielectric;
• removing the mask and poly-Si, but not the gate oxide to define a dummy gate which leaves intact the gate oxide and the gate edge liner such that the gate edge liner defines entire sidewalls of the dummy gate and the gate oxide is at the bottom of the dummy gate;
• and filling the dummy gate with metal such that the metal contacts the gate oxide.