US 7,403,203 B2 · Stacking series of non-power-of-two frame buffers in a memory array

Abstract

Storing frames of data in frame buffers sized to match the frame size when the frame size is not a power-of-two number of bytes is disclosed. The buffer size is chosen to be the largest power-of-two that is less than the frame size. When a frame of data is to be stored, the buffer number of a free buffer is effectively multiplied by the buffer size to obtain a partial frame buffer address Q. The buffer size subtracted from the frame size is referred to as a residual buffer size, and the buffer number is effectively multiplied by the residual buffer size to obtain a residual frame buffer address R. The full frame buffer starting address S=Q+R. For implementations where the difference between the frame size and the buffer size is a power-of-two value, binary shifts and addition can be used instead of a multiplier.

Claims18

Dependent claims

A method for efficiently storing frames of data in a plurality of contiguous frame buffers in a frame buffer memory when a frame size of the frames of data is not a power-of-two number of bytes, comprising:

partitioning the frame buffer memory into N frame-independent buffers, where N is a power-of-two, each frame-independent buffer representable by a M-bit frame-independent buffer number and having a frame-independent buffer size chosen to be a largest power-of-two value less than the frame size;
computing a residual buffer size as a difference between the frame size and the frame-independent buffer size;
and
for each frame of data to be stored,
computing a frame buffer address S utilizing a particular frame-independent buffer number, the frame-independent buffer size and the residual buffer size, and
storing the frame of data into the frame buffer having the frame buffer address S, each frame buffer sized to match the non-power-of-two frame size of the frames of data.

3 more elements

A system for efficiently storing frames of data in a plurality of contiguous frame buffers in a frame buffer memory when a frame size of the frames of data is not a power-of-two number of bytes, comprising:

a frame buffer memory partitioned into N frame-independent buffers, where N is a power-of-two, each frame-independent buffer representable by a M-bit frame-independent buffer number and having a frame-independent buffer size chosen to be a largest power-of-two value less than the frame size;
and
a frame buffer address generator coupled to the frame buffer memory, the frame buffer address generator configured for storing a residual buffer size equal to a difference between the frame size and the frame-independent buffer size, and, for each frame of data to be stored, computing a frame buffer address S utilizing a particular frame-independent buffer number, the frame-independent buffer size and the residual buffer size, and storing the frame of data into the frame buffer having the frame buffer address S, each frame buffer sized to match the non-power-of-two frame size of the frames of data.

Dependencies are inferred from the claim text.

Stacking series of non-power-of-two frame buffers in a memory array

Life of this patent

Stacking series of non-power-of-two frame buffers in a memory array

Life of this patent

Abstract

Claims18