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US 7,403,144 B1Granted
Pulse domain encoder and filter circuits
AssigneeHRL Laboratories, LLC
InventorsJose M. Cruz-Albrecht, Peter Petre
Life of this patent
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Abstract
A pulse circuit to solve a system of differential equations in the pulse domain based on analog or inputs or time-encoded pulse inputs. Intrinsically linear 1-bit digital to analog converters are used as feedback elements within circuits implementing solutions to a differential equation or to a system of differential equations. The circuits may be used to implement filters. While the input to the circuit may be an analog signal, the internal signals of the circuit are time-encoded current or voltage pulses. Output of the circuit is a time-encoded pulse or a series of time-encoded pulses from which an analog output may be recovered by time decoding.
Claims20
A circuit for solving a first order linear ordinary differential equation comprising:
- a second order unit element encoder circuit;
- and
- a time decoder circuit coupled in series to the second order unit element encoder circuit,
- wherein the second order unit element encoder circuit includes:
- an input amplifier responsive to an input signal and providing an amplified output signal;
- a first 1-bit digital to analog converter having a first 1-bit digital to analog converter input and a first 1-bit digital to analog converter output;
- a first adder having a first adder first input responsive to the amplified output signal and a first adder second input responsive to an output signal from the first 1-bit digital to analog converter to provide a first sum output signal;
- a first integrator responsive to the first sum output signal and providing a first integrated output signal;
- a second 1-bit digital to analog converter having a second 1-bit digital to analog converter input and a second 1-bit digital to analog converter output;
- a second adder having a second adder first input responsive to the first integrated signal and a second adder second input responsive to an output signal from the second 1-bit digital to analog converter signal to provide a second sum signal;
- a second integrator responsive to the second sum signal and providing a second integrated output signal;
- and
- a hysteresis quantizer responsive to the second integrated output signal and providing a time encoded pulse output signal corresponding to a time encoding of a solution of the first order linear ordinary differential equation,
- wherein the first 1-bit digital to analog converter is responsive to the time encoded pulse output signal and feeds back the time encoded pulse output signal to the first adder second input,
- wherein the second 1-bit digital to analog converter is responsive to the time encoded pulse output signal and feeds back the time encoded pulse output signal to the second adder input, and
- wherein the time decoder circuit is responsive to the time encoded pulse output signal and is adapted to recover the solution of the first order linear ordinary differential equation from the time encoded pulse output signal.
13 more elements
An array of encoder circuits comprising:
- a first encoder circuit responsive to a first input signal and providing a first output signal;
- a second encoder circuit responsive to a second input signal and providing a second output signal;
- a first cross-feedback 1-bit DAC for providing the second output signal to the first encoder circuit;
- and
- a second cross-feedback 1-bit DAC for providing the first output signal to the second encoder circuit,
- wherein each encoder circuit in the array of encoder circuits includes:
- an input amplifier responsive to an amplifier input signal;
- a first adder coupled to the input amplifier and to a cross-feedback 1-bit digital to analog converter of the other encoder circuit;
- a first integrator coupled to the first adder;
- a second adder coupled to the first integrator;
- a second integrator coupled to the second adder;
- a hysteresis quantizer coupled to the second integrator and providing a hysteresis quantizer output signal;
- a first 1-bit DAC coupled between an output of the hysteresis quantizer and the second adder and providing the hysteresis quantizer output signal as a feedback signal to the second adder;
- and
- a second 1-bit DAC coupled between the output of the hysteresis quantizer and the first adder and providing the hysteresis quantizer output signal as a feedback signal to the first adder,
- wherein the first output signal and the second output signal are time encoded pulse signals.
13 more elements
A filter circuit for implementing an analog filter of order N, the filter circuit comprising:
- a first order unit for producing an output signal, the output signal being a time encoded pulse;
- a plurality of N second order units for providing N state variables to the first order unit, the N state variables being time encoded pulses;
- and
- wherein each of the N second order units receives cross-feedbacks of the N state variables from each of the N second order units,
- wherein at least a first one of the N second order units receives an external input signal as input, and
- wherein the external input signal in selected from a group consisting of an analog signal and a time encoded pulse signal.
3 more elements
Dependencies are inferred from the claim text.