Determining voltage level validity for a power-on reset condition
AssigneeXilinx, Inc.
InventorAustin H. Lesea
Life of this patent
Estimating the term…
Abstract
Determining voltage level validity for a power-on reset condition is described. A supply voltage is applied to an integrated circuit. An oscillating signal is generated responsive to the supply voltage applied. A counting occurs responsive to oscillations of the oscillating signal. A triggering occurs responsive to reaching a first voltage level of the supply voltage for the power-on reset condition. A first count of the counting occurs responsive to the triggering. A second count is selected responsive to the first count. A second level is accepted as having at least met a threshold for the supply voltage responsive to the counting reaching the second count for the power-on reset condition.
Claims13
A method for determining voltage level validity for a power-on reset condition, comprising:
- applying a supply voltage to an integrated circuit;
- receiving the supply voltage in a first power-on reset circuit of the integrated circuit;
- generating an oscillating signal responsive to the supply voltage applied, the oscillating signal having a frequency which is a function of the first supply voltage level;
- counting oscillations of the oscillating signal;
- storing a first count of the oscillations of the oscillating signal;
- outputting the first count in response to a first change in output state of the first power-on reset circuit;
- selecting a target count of oscillations of the oscillating signal, the target count being greater than the first count and indicating that the supply voltage has reached at least a first minimum level specified for the supply voltage;
- triggering a first power-on reset responsive to reaching a first voltage level of the supply voltage for the power-on reset condition;
- receiving the supply voltage in a second power-on reset circuit;
- storing a second count of the oscillations of the oscillating signal;
- outputting the second count in response to a second change in output state of the second power-on reset circuit;
- triggering a second power-on reset responsive to reaching a second voltage level of the supply voltage for the power-on reset condition;
- receiving the first count and the second count;
- determining a rate of change between the first voltage level and the second voltage level responsive to a difference between the first count and the second count;
- and
- selecting a third count greater than the second count, the third count indicating an amount of additional time to wait to reach a third voltage level for the supply voltage.
A voltage level validity circuit of an integrated circuit for a power-on reset condition, comprising:
- a first power-on reset circuit coupled to receive a first supply voltage and configured to provide a first change in output state responsive to the first supply voltage reaching a first threshold level;
- an oscillator coupled to receive the first supply voltage and configured to provide an oscillating signal;
- the oscillating signal having a frequency which is a function of voltage level of the first supply voltage;
- a counter coupled to receive the oscillating signal and configured to count responsive to the oscillating signal during the power-on reset condition;
- a first latch coupled to the counter and to the first power-on reset circuit;
- the first latch configured to store a first count of the counter;
- the first latch configured to output the first count of the counter responsive at least in part to the first change in output state of the first power-on reset circuit;
- a select circuit coupled to receive the first count from the first latch and configured to select a target count of the counter, the target count being greater than the first count reached;
- the target count indicating when at least the first supply voltage will have reached at least a first minimum level specified for the first supply voltage;
- a second power-on reset circuit coupled to receive the first supply voltage and configured to provide a second change in output state responsive to the first supply voltage reaching a second threshold level;
- a second latch coupled to the counter and to the second power-on reset circuit;
- the second latch configured to store a second count of the counter;
- the second latch configured to output the second count of the counter responsive at least in part to the second change in output state of the second power-on reset circuit;
- the select circuit coupled to receive the first count from the first latch and the second count from the second latch;
- the select circuit configured to determine a rate of change responsive to a difference between the first count and the second count;
- and
- the select circuit configured to select the target count of the counter responsive to the rate of change.
Dependencies are inferred from the claim text.