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US 7,403,046 B2Granted
Sample-and-hold circuits
AssigneeNovatek Microelectronics Corp.
InventorsChih-Jen Yen, Chih-Hsin Hsu
Life of this patent
Estimating the term…
Abstract
A sample-and-hold circuit including a first switch, a first capacitor and an amplifier is provided. The switch has a first terminal to receive the input signal and transmit it to a second terminal thereof in the sample period. The first terminal of the first capacitor couples to the second terminal of the first switch, and the second terminal of the first capacitor couples to a first voltage for storing the sampling result of the input signal. The amplifier couples to the second terminal of the first switch, wherein the amplifier is disabled in the sample period, and the amplifier is enabled to generate the output signal according to the sampling result in the hold period.
Claims40
A sample-and-hold circuit, comprising:
- a first switch, having a first terminal receiving an input signal, for transmitting the input signal to a second terminal of the first switch in a sample period;
- a first capacitor, wherein a first terminal of the first capacitor couples to the second terminal of the first switch, a second terminal of the first capacitor couples to a first voltage, for storing a sampling result of the input signal;
- and
- an amplifier, coupling to the second terminal of the first switch, wherein the amplifier is disabled in the sample period, and the amplifier is enabled to output an output signal according to the sampling result in a hold period, the amplifier comprising:
- a positive input terminal coupling to the second terminal of the first switch;
- a negative input terminal;
- an output terminal for outputting the output signal;
- a first resistor, wherein a first terminal of the first resistor couples to the negative input terminal, and a second terminal of the first resistor couples to the output terminal;
- and
- an input stage coupling to the positive input terminal and the negative input terminal for outputting an internal signal in the hold period according to the signals of the positive input terminal and the negative input terminal and stopping to output the internal signal in the sample period, wherein the input stage comprises:
- a first controllable current source, for providing a current during a hold period and not providing the current during the sample period;
- a first transistor, having a gate terminal coupled to the positive input terminal, a first source/drain coupled to the first controllable current source, and a second source/drain coupled to an output stage;
- and
- a second transistor, having a gate terminal coupled to the negative input terminal, a first source/drain coupled to the first controllable current source, and a second source/drain coupled to the output stage;
- and
- the output stage, for providing the output signal to the output terminal according to the internal signal.
13 more elements
A sample-and-hold circuit, comprising:
- a first switch, having a first terminal receiving an input signal, for transmitting the input signal to a second terminal of the first switch in a first period;
- a fourth switch, having a first terminal receiving the input signal, for transmitting the input signal to a second terminal of the fourth switch in a second period;
- a first capacitor, having a first terminal coupled to the second terminal of the first switch, a second terminal of the first capacitor coupled to a first voltage, for storing a first sampling result of the input signal;
- a second capacitor, having a first terminal couples to the second terminal of the fourth switch, a second terminal of the second capacitor coupled to a fourth voltage, for storing a second sampling result of the input signal;
- and
- an amplifier, wherein the amplifier comprises:
- a first positive input terminal, coupling to the second terminal of the first switch;
- a second positive input terminal, coupling to the second terminal of the fourth switch;
- a first negative input terminal;
- a second negative input terminal;
- an output terminal, coupling to the first negative input terminal and the second negative input terminal, for outputting an output signal in the first period according to the second sampling result, and outputting the output signal in the second period according to the first sampling result;
- a first input stage, coupling to the first positive input terminal and the first negative input terminal, for outputting a first internal, signal in the second period according to the signals of the first positive input terminal and the first negative input terminal, and stopping to output the first internal signal in the first period;
- a second input stage, coupling to the second positive input terminal and the second negative input terminal, for outputting a second internal signal in the first period according to the signals of the second positive input terminal and the second negative input terminal, and stopping to output the second internal signal in the second period;
- and
- an output stage, for providing the output signal to the output terminal according to the first internal signal and the second internal signal.
12 more elements
A sample-and-hold circuit, comprising:
- a first switch, having a first terminal receiving an input signal, for transmitting the input signal to a second terminal of the first switch in a first period;
- a fourth switch, having a first terminal receiving the input signal, for transmitting the input signal to a second terminal of the fourth switch in a second period;
- a first capacitor, having a first terminal coupled to the second terminal of the first switch, a second terminal of the first capacitor coupled to a first voltage, for storing a first sampling result of the input signal;
- a second capacitor, having a first terminal couples to the second terminal of the fourth switch, a second terminal of the second capacitor coupled to a fourth voltage, for storing a second sampling result of the input signal;
- and
- an amplifier, wherein the amplifier comprises:
- a first positive input terminal, coupling to the second terminal of the first switch;
- a second positive input terminal, coupling to the second terminal of the fourth switch;
- a first negative input terminal;
- a second negative input terminal;
- an output terminal, coupling to the first negative input terminal and the second negative input terminal, for outputting an output signal in the first period according to the second sampling result, and outputting the output signal in the second period according to the first sampling result;
- a first resistor, wherein a first terminal of the first resistor couples to the first negative input terminal and the second negative input terminal, a second terminal of the first resistor couples to the output terminal;
- a first input stage, coupling to the first positive input terminal and the first negative input terminal, for outputting a first internal signal in the second period according to the signals of the first positive input terminal and the first negative input terminal, and stopping to output the first internal signal in the first period;
- a second input stage, coupling to the second positive input terminal and the second negative input terminal, for outputting a second internal signal in the first period according to the signals of the second positive input terminal and the second negative input terminal, and stopping to output the second internal signal in the second period;
- and
- an output stage, for providing the output signal to the output terminal according to the first internal signal and the second internal signal.
13 more elements
Dependencies are inferred from the claim text.