Dual path linear voltage regulator
AssigneeIntel Corporation
InventorVladimir Zlatkovic
Life of this patent
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Abstract
A voltage regulator comprising two feedback loops for regulating a load voltage, where the first feedback loop comprises a pass transistor to source current to the load, and the second feedback loop comprises a shunt transistor to shunt current from the pass transistor to ground. The use of two feedback loops allows the design of a voltage regulator in which it small-signal impedance, as seen by a power rail, has a phase not less than −90 degrees. This mitigates interactions between the power rail and the voltage regulator that may lead to oscillations, without the need for a relatively large de-coupling capacitor. Other embodiments are described and claimed.
Claims17
A circuit comprising:
- a node having a voltage;
- a first feedback loop to regulate the node voltage, comprising a pass transistor to source a current to the node, the pass transistor having a gate, the first feedback loop comprising a unity gain buffer having an output port connected to the gate of the pass transistor and having an input port;
- and
- a second feedback loop to regulate the node voltage, comprising a shunt transistor having a gate-to-source voltage and a threshold voltage, the shunt transistor to shunt a portion of the current when the gate-to-source voltage exceeds the threshold voltage, the shunt transistor having a gate connected to the input port of the unity gain buffer.
A circuit comprising:
- a node;
- a pass transistor comprising a gate and a drain connected to the node;
- a buffer comprising an input port and an output port connected to the gate of the pass transistor;
- a shunt transistor comprising a gate and a drain connected to the node;
- and
- a first operational amplifier comprising an output port connected to the gate of the shunt transistor and to the input port of the buffer, and a positive input port connected to the drain of the shunt transistor.
A computer system comprising:
- a memory;
- and
- a processor in communication with the memory, the processor comprising a voltage regulator, the voltage regulator comprising;
- a node having a voltage;
- a first feedback loop to regulate the node voltage, comprising a pass transistor to source a current to the node, the pass transistor having a gate, the first feedback loop comprising a unity gain buffer having an output port connected to the gate of the pass transistor and having an input port;
- and
- a second feedback loop to regulate the node voltage, comprising a shunt transistor having a gate-to-source voltage and a threshold voltage, the shunt transistor to shunt a portion of the current when the gate-to-source voltage exceeds the threshold voltage, the shunt transistor having a gate connected to the input port of the unity gain buffer.
Dependencies are inferred from the claim text.