Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
AssigneeMicron Technology, Inc.
InventorJames M. Wark
Life of this patent
Estimating the term…
Abstract
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area on the surface of the base at least partially bounded by the wire-bondable pads. A first integrated circuit (IC) die is flip-chip bonded to the flip-chip pads, and a second IC die is back-side attached to the first IC die and then wire-bonded to the wire-bondable pads. As a result, the flip-chip mounted first IC die is stacked with the second IC die in a simple, novel manner.
Claims12
A memory device comprising at least two electronic devices, each memory device including:
- a base having a surface having a first plurality of flip-chip pads thereon and a second plurality of wire-bondable pads, a majority of flip-chip pads of the first plurality of flip-chip pads connected to a majority of the wire bondable pads of the second plurality of wire-bondable pads;
- a first integrated circuit memory chip having opposing front-side and back-side surfaces, the front-side surface having a plurality of flip-chip bumps thereon connected to the at least one flip-chip pad of the first plurality of flip-chip pads on the surface of the base;
- a second integrated circuit memory chip having opposing front-side and back-side surfaces, the back-side surface attached to the back-side surface of the first integrated circuit memory chip and the front-side surface having a plurality of bond pads thereon;
- and
- at least one connection between at least one bond pad of the plurality of bond pads on the front-side surface of the second integrated circuit memory chip and the at least one wire-bondable pad of the second plurality of wire-bondable pads on the surface of the base.
An assembly forming a memory device comprising at least two electronic devices, each memory device including:
- a base having a surface having a first plurality of flip-chip pads thereon and a second plurality of wire-bondable pads, a number of the first plurality of flip-chip pads connected to a number of the second plurality of wire-bondable pads for the first plurality of flip-chip pads as a group to electrically mirror the second plurality of wire-bondable pads as a group;
- a first integrated circuit memory chip having opposing front-side and back-side surfaces, the front-side surface having a plurality of flip-chip bumps thereon connected to the at least one flip-chip pad of the first plurality of flip-chip pads on the surface of the base;
- a second integrated circuit memory chip having opposing front-side and back-side surfaces, the back-side surface attached to the back-side surface of the first integrated circuit memory chip and the front-side surface having a plurality of bond pads thereon;
- and
- at least one connection between the at least one bond pad of the plurality of bond pads on the front-side surface of the second integrated circuit memory chip and the at least one wire-bondable pad of the second plurality of wire-bondable pads on the surface of the base.
A memory device comprising one or more electronic devices each including:
- a base having a surface with a plurality of flip-chip pads thereon defining an area thereon at least partially bounded by a plurality of wire-bondable pads thereon, the plurality of flip-chip pads being interconnected with the plurality of wire-bondable pads such that the plurality of flip-chip pads as a group electrically mirror the plurality of wire-bondable pads as a group;
- a first integrated circuit memory chip having opposing front-side and back-side surfaces, the front-side surface having a plurality of flip-chip bumps thereon facing the surface of the base in alignment with and connected to the plurality of flip-chip pads on the surface of the base;
- and
- a second integrated circuit memory chip having opposing front-side and back-side surfaces, the back-side surface facing the back-side surface of the first integrated memory chip in attachment therewith and the front-side surface having a plurality of bond pads thereon wire-bonded to the plurality of wire-bondable pads on the surface of the base.
Dependencies are inferred from the claim text.