Zr— Sn—Ti—O films
AssigneeMicron Technology, Inc.
InventorsKie Y. Ahn, Leonard Forbes
Life of this patent
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Abstract
A dielectric film containing Zr—Sn—Ti—O formed by atomic layer deposition using a TiI4 precursor and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Depositing titanium and oxygen onto a substrate surface by atomic layer deposition using a TiI4 precursor, depositing zirconium and oxygen onto a substrate surface by atomic layer deposition, and depositing tin and oxygen onto a substrate surface by atomic layer deposition form the Zr—Sn—Ti—O dielectric layer. Dielectric films containing Zr—Sn—Ti—O formed by atomic layer deposition using TiI4 are thermodynamically stable such that the Zr—Sn—Ti—O will have minimal reactions with a silicon substrate or other structures during processing.
Claims53
An electronic device comprising:
- a substrate;
- and
- a dielectric layer on the substrate, the dielectric layer containing a Zr—Sn—Ti—O layer, the Zr—Sn—Ti—O layer having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the Zr—Sn—Ti—O layer substantially chlorine free.
A capacitor, comprising:
- a first conductive layer on a substrate;
- a dielectric layer containing a Zr—Sn—Ti—O layer, the Zr—Sn—Ti—O layer having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the Zr—Sn—Ti—O layer substantially chlorine free;
- and
- a second conductive layer disposed on the dielectric layer.
A transistor comprising:
- a body region on a substrate between a source region and a drain region;
- a dielectric film containing a Zr—Sn—Ti—O layer, the Zr—Sn—Ti—O layer having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the Zr—Sn—Ti—O layer substantially chlorine free, the Zr—Sn—Ti—O layer including a solid solution of titanium oxide, zirconium oxide, and tin oxide, the dielectric film disposed on the body region between the source region and the drain region;
- and
- a gate coupled to the dielectric film.
A transistor comprising:
- a body region on a substrate between a source region and a drain region;
- a gate dielectric disposed on the body region;
- a floating gate disposed on the gate dielectric;
- a control gate;
- a floating gate dielectric interposed between the floating gate and the control gate, wherein at least one of the gate dielectric and the floating gate dielectric includes a dielectric film containing a Zr—Sn—Ti—O layer, the Zr—Sn—Ti—O layer having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the Zr—Sn—Ti—O layer substantially chlorine free.
A memory comprising:
- a number of transistors in an array on a substrate, each transistor having a body region between a source region and a drain region, at least one transistor including a gate coupled to a dielectric film disposed above the body region, the dielectric film containing a layer of Zr—Sn—Ti—O, the layer of Zr—Sn—Ti—O having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the layer of Zr—Sn—Ti—O substantially chlorine free;
- and
- a number of word lines coupled to a number of the gates of the number of access transistors.
An electronic system comprising:
- a substrate;
- a dielectric layer on the substrate, the dielectric layer containing a Zr—Sn—Ti—O layer, the Zr—Sn—Ti—O layer having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the Zr—Sn—Ti—O layer substantially chlorine free.
An electronic system comprising:
- a processor;
- a system bus;
- and
- a memory coupled to the processor by the system bus, the memory including:
- a number of transistors in an array on a substrate, each transistor having a body region between a source region and a drain region, at least one transistor including a gate coupled to a dielectric film disposed above the body region, the dielectric film containing a Zr—Sn—Ti—O layer, the Zr—Sn—Ti—O layer having a surface with a roughness less than a monolayer of the Zr—Sn—Ti—O, the Zr—Sn—Ti—O layer substantially chlorine free, wherein the Zr—Sn—Ti—O layer includes a layer of a solid solution of titanium oxide, zirconium oxide, and tin oxide;
- and
- a number of word lines coupled to a number of the gates of the number of transistors.
Dependencies are inferred from the claim text.