Method for transmitting data, apparatus for recording data, medium for recording data, and apparatus for reproducing data

An apparatus for recording on a record medium, digital data on which an error correction or detection process has been performed, the apparatus comprising:

• means for entering key data;
• conversion means for converting digital data into encrypted data according to the key data;
• generating means for generating parity data based on the encrypted data;
• mixing means for mixing the parity data with a data body for recording,
• wherein at least a part of said data body is composed of an unconverted portion of the digital data;
• means for detecting an error location based on information data and the parity data;
• means for calculating an error value as a difference between the data before error correction and the data after error correction;
• means for performing an operation using the error value to modify the data;
• a first exclusive or (XOR) circuit operates to directly output information data sent from a delaying circuit when the first XOR circuit receives a binary zero digit from a latch circuit;
• and
• a second exclusive or (XOR) circuit operates to output inverted information data from the delaying circuit when the second XOR circuit receives a binary one digit from the latch circuit.

A record medium having stored thereon a processing program, that when executed causes a reproducing apparatus to perform a method of transmitting digital data on which an error correction or detection process has been performed, the processing program comprising:

• program code for converting the digital data into encrypted data according to key data;
• program code for generating parity data based on the encrypted data;
• program code for mixing and transmitting the parity data with a data body, wherein at least a part of said data body is composed of an unconverted portion of the digital data;
• and
• program code for detecting an error location based on information data and the parity data;
• program code for calculating an error value as a difference between the data before error correction and the data after error correction;
• and
• program code for providing the error value to a data modifying circuit that performs an operation using the error value to modify the data;
• program code for operating a first exclusive or (XOR) circuit to directly output information data sent from a delaying circuit when the first XOR circuit receives a binary zero digit from a latch circuit;
• and
• program code for operating a second exclusive or (XOR) circuit to output inverted information data from the delaying circuit when the second XOR circuit receives a binary one digit from the latch circuit.

An apparatus, for reproducing data recorded on a record medium, the data on which an error correction or detection coding process has been performed, the apparatus comprising:

• means for reading from the record medium, parity data obtained by performing data conversion on information data treated in said error correction or detecting coding process according to key information and, information data at least partly composed of non-converted said information data;
• means for inputting encryption key information indicating the information data on which said data conversion is performed when performing an error correction or detecting decoding process for said error correction or detection coding process;
• means for detecting an error location based on information data and the parity data;
• means for calculating an error value as a difference between the data before error correction and the data after error correction;
• means for providing the error value to a data modifying circuit that performs an operation using the error value to modify the data;
• a first exclusive or (XOR) circuit operates to directly output inflation data sent from a delaying circuit when the first XOR circuit receives a binary zero digit from a latch circuit;
• and
• a second exclusive or (XOR) circuit operates to output inverted information data from the delaying circuit when the second XOR circuit receives a binary one digit from the latch circuit.