Transaction switch and network interface adapter incorporating same

A transaction switch for switching data between a plurality of data devices, comprising:

• a memory, shared by the plurality of data devices for buffering data received thereby;
• multiplexing logic, coupled to said memory, for controlling the transfer of data between the plurality of data devices and said memory;
• and
• control logic, coupled to said multiplexing logic, for controlling said multiplexing logic;
• wherein the plurality of data devices comprise a plurality of packetized data devices and a plurality of addressed data devices;
• wherein said control logic is configured to selectively control said multiplexing logic to transfer data through said memory between two of said packetized data devices and between one of said packetized data devices and one of said addressed data devices;
• wherein said control logic is configured to selectively control said multiplexing logic to transfer data through said memory between two of said packetized data devices and between one of said packetized data devices and one of said addressed data devices in response to a transaction posted to the transaction switch by the plurality of data devices;
• wherein said transaction comprises a command to transfer data between said memory and one of the plurality of data devices;
• wherein said transaction comprises an address of a buffer within said memory, wherein said data to be transferred in response to said command is stored in said memory.

A transaction switch for switching transactions and data between a plurality of data interfaces, the transaction switch comprising:

• a memory, shared by the plurality of data interfaces, for buffering data received thereby;
• a plurality of transaction queues, associated with each of the plurality of data interfaces, configured to store transactions, said transactions adapted to convey information to enable the plurality of data interfaces to transfer said data according to a plurality of disparate data transfer protocols supported thereby;
• and
• control logic, coupled to said memory and said plurality of transaction queues, configured to route said data through said shared memory between the plurality of data interfaces and to switch said transactions between the plurality of data interfaces;
• wherein at least one of the plurality of data interfaces comprises a bus router for performing a transport layer function between at least two of the plurality of data interfaces which support disparate data protocols;
• wherein at least one of the plurality of data interfaces comprises a local bus interface for interfacing to a local bus, wherein at least one of the plurality of data interfaces comprises a MAC for interfacing to a network, wherein said bus router is configured to perform said transport layer function by writing packet header information into an allocated portion of said memory in front of data written into said allocated portion of said memory by said local bus interface;
• wherein said bus router is configured to write said packet header information into said allocated portion of said memory before said MAC reads said packet from said allocated portion of said memory for writing to said network, without copying said data to another memory.

An integrated circuit, comprising:

• at least three data interfaces;
• a memory, shared by said at least three data interfaces for buffering data therebetween;
• and
• a transaction switch, coupled to said at least three data interfaces and said memory, for dynamically allocating portions of said memory to said at least three data interfaces for storing data therein, and for controlling access to said allocated portions of said memory by each of said at least three data interfaces;
• wherein at least one of said at least three data interfaces is of a different type than the others;
• wherein at least one of said at least three data interfaces comprises a bus router for performing a transport layer function between at least two other of said at least three data interfaces which support disparate data protocols;
• wherein at least one of said at least three data interfaces comprises a local bus interface for interfacing to a local bus, wherein at least one of said at least three data interfaces comprises a MAC for interfacing to a network, wherein said bus router is configured to perform said transport layer function by writing packet header information into said allocated portions of said memory in front of data written into said allocated portions of said memory by said local bus interface;
• wherein said bus router is configured to write said packet header information into said allocated portions of said memory before said MAC reads said packet from said allocated portion of said memory for writing to said network, without copying said data to another memory.

A network interface adapter, comprising:

• a plurality of network ports, for interfacing to a network;
• at least one addressed data bus interface;
• a memory, for buffering data received by said plurality of network ports and said at least one addressed data bus interface;
• a transport layer engine for performing a transport layer function for routing said data between said plurality of network ports and said at least one addressed data bus interface;
• a plurality of transaction queues, associated with each of said plurality of network ports, said at least one addressed data bus interface and said transport layer engine, for storing transactions;
• and
• a transaction switch, coupled to said plurality of transaction queues, configured to route said transactions between said plurality of network ports, said at least one addressed data bus interface and said transport layer engine;
• wherein said transport layer engine is configured to perform said transport layer function by writing packet header information into an allocated portion of said memory in front of data written into said allocated portion of said memory by said at least one addressed data bus interface;
• wherein said transport layer engine is configured to write said packet header information into said allocated portion of said memory before one of said plurality of network ports reads said packet from said allocated portion of said memory for writing to said network, without copying said data to another memory.

A transaction switch in a network device having a buffer memory and plurality of data devices, including packetized and addressed data devices, the transaction switch comprising:

• a buffer manager, for allocating portions of the buffer memory to the plurality of data devices on an as-needed basis;
• a plurality of data paths, coupling the buffer memory and the plurality of packetized and addressed data devices, for providing the plurality of data devices access to the buffer memory;
• a mapping table, for storing packet destination identification information;
• a plurality of transaction queues, for transferring transactions between the transaction switch and the plurality of data devices;
• and
• control logic, coupled to said mapping table and said plurality of transaction queues, for selectively switching transactions between the plurality of data devices based on said mapping table information and based on contents of said transactions;
• wherein at least one of the plurality of data devices comprises a bus router for performing a transport layer function between at least two of the plurality of data devices which support disparate data protocols;
• wherein at least one of the plurality of data devices comprises a local bus interface for interfacing to a local bus, wherein at least one of the plurality of data devices comprises a MAC for interfacing to a network, wherein said bus router is configured to perform said transport layer function by writing packet header information into said allocated portions of the buffer memory in front of data written into said allocated portions of the buffer memory by said local bus interface;
• wherein said bus router is configured to write said packet header information into said allocated portions of the buffer memory before said MAC reads said packet from said allocated portion of the buffer memory for writing to said network, without copying said data to another memory.

A network interface adapter, comprising:

• a local bus interface, configured to connect the adapter to a local bus and to perform an addressed data protocol on the local bus;
• a media access controller (MAC), configured to connect the adapter to a network and to perform a packetized data protocol on the network;
• a transport protocol engine, configured to perform protocol translation from the addressed data protocol to the packetized data protocol by creating a packet from data received on the local bus by the local bus interface;
• a memory, directly accessible by each of the local bus interface, the MAC, and the transport protocol engine in a random access fashion;
• a transaction switch, coupled to the local bus interface, the MAC, the transport protocol engine, and the memory, and configured to dynamically allocate a portion of the memory for buffering the data and the packet;
• wherein the transport protocol engine is configured to perform the protocol translation before the MAC reads the packet from the memory for transmission on the network, wherein the transport protocol engine performs the protocol translation without copying the data to another memory;
• wherein the transport protocol engine is further configured to perform second protocol translation from the packetized data protocol to the addressed data protocol by identifying a data payload within a second packet received from the network by the MAC and specifying a local bus address for the data payload;
• wherein the transport protocol engine is further configured to perform the second protocol translation before the local bus interface reads the data payload from the memory for writinci on the local bus to the local bus address, wherein the transport protocol engine performs the second protocol translation within the memory without copying the data to another memory.

A network interface adapter, comprising:

• a local bus interface, configured to connect the adapter to a local bus and to perform an addressed data protocol on the local bus;
• a media access controller (MAC), configured to connect the adapter to a network and to perform a packetized data protocol on the network;
• a transport protocol engine, configured to perform protocol translation from the packetized data protocol to the addressed data protocol by identifying a data payload within a packet received from the network by the MAC and specifying a local bus address for said data payload;
• a memory, directly accessible by each of the local bus interface, the MAC, and the transport protocol engine in a random access fashion;
• a transaction switch, coupled to the local bus interface, the MAC, the transport protocol engine, and the memory, and configured to dynamically allocate a portion of the memory for buffering the data payload and the packet;
• wherein the transport protocol engine is configured to perform the protocol translation before the local bus interface reads the data payload from the memory for writing on the local bus to said local bus address, wherein the transport protocol engine performs the protocol translation without copying the data to another memory;
• wherein the transport protocol engine is further configured to perform second protocol translation from the addressed data protocol to the packetized data protocol by creating a second packet from data received on the local bus by the local bus interface;
• wherein the transport protocol engine is further configured to perform the second protocol translation before the MAC reads the second packet from the memory for transmission on the network, wherein the transport protocol engine performs the second protocol translation without copying the data to another memory.

A method for performing a transport layer function without double-buffering in a network interface adapter comprising a local bus interface, a media access controller (MAC), a transport protocol engine, and a memory managed by the transaction switch and directly accessible by each of the local bus interface, the MAC, and the transport protocol engine in a random access fashion, the method comprising:

• allocating, by the transaction switch, a portion of the memory for buffering data received on the local bus by the local bus interface;
• writing, by the local bus interface, the data into the allocated portion of the memory;
• creating, by the transport protocol engine, with the data a packet within the allocated portion of the memory;
• reading, by the MAC, the packet from the allocated portion of the memory for transmission on a network, after said creating, wherein the transport protocol engine performs said creating the packet without copying the data to another memory;
• allocating, by the transaction switch, a second portion of the memory for buffering a second packet received from the network by the MAC;
• writing, by the MAC, the second packet into the second allocated portion of the memory;
• identifying, by the transport protocol engine, a data payload within the second packet;
• specifying, by the transport protocol engine, a local bus address for the data payload;
• and
• reading, by the local bus interface, the data payload from the second allocated portion of the memory for writing on the local bus to the local bus address, after said identifying and said specifying, wherein the transport protocol engine performs said identifying and said specifying without copying the data to another memory.

A method for performing a transport layer function without double-buffering in a network interface adapter comprising a local bus interface, a media access controller (MAC), a transport protocol engine, and a memory managed by a transaction switch and directly accessible by each of the local bus interface, the MAC, and the transport protocol engine in a random access fashion, the method comprising:

• allocating, by the transaction switch, a portion of the memory for buffering a packet received from the network by the MAC;
• writing, by the MAC, the packet into the allocated portion of the memory;
• identifying, by the transport protocol engine, a data payload within the packet;
• specifying, by the transport protocol engine, a local bus address for the data payload;
• reading, by the local bus interface, the data payload from the allocated portion of the memory for writing on the local bus to the local bus address, after said identifying and said specifying, wherein the transport protocol engine performs said identifying and said specifying without copying the data to another memory;
• allocating, by the transaction switch, a second portion of the memory for buffering data received on the local bus by the local bus interface;
• writing, by the local bus interface, the data into the second allocated portion of the memory;
• creating, by the transport protocol engine, with the data a second packet within the second allocated portion of the memory;
• and
• reading, by the MAC, the second packet from the second allocated portion of the memory for transmission on a network, after said creating, wherein the transport protocol engine performs said creating the second packet without copying the data to another memory.