US 7,398,505 B2Granted

Automatic back annotation of a functional definition of an integrated circuit design based upon physical layout

AssigneeInternational Business Machines Corporation

InventorsMark S. Fredrickson, Glen Howard Handlogten, Chad B. McBride

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Abstract

An apparatus, program product and method automatically back annotate a functional definition of a circuit design based upon the physical layout generated from the functional definition. A circuit design may be back annotated, for example, by generating a plurality of assignments between a plurality of circuit elements in the circuit design and a plurality of signals defined for the circuit design using a physical definition of the circuit design that has been generated from the functional definition, and modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition.

Claims18

Dependent claims

A method of annotating a functional definition of a circuit design, the method comprising:

using a physical definition of the circuit design that has been generated from the functional definition, generating a plurality of assignments between a plurality of circuit elements in the circuit design and a plurality of signals defined for the circuit design;
and
automatically modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition;
wherein the plurality of assignments includes a first assignment configured to couple a first circuit element among the plurality of circuit elements to a first signal among the plurality of signals, wherein the first circuit element is defined in a first HDL file among a plurality of HDL files in the functional definition, and wherein modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition includes, for at least the first assignment:
storing a record associated with the first assignment in a first data structure associated with the first HDL file, wherein the first data structure is among a plurality of data structures respectively associated with the plurality of HDL files;
associating a stage identifier with the record in the first data structure, wherein the stage identifier identifies an initial execution stage among a plurality of execution stages;
processing the record by retrieving the record from the first data structure and passing the record to the execution stage among the plurality of execution stages that is identified by the stage identifier for the record;
and
after processing the record, and until the stage identifier for the record indicates that the record has been processed by all of the execution stages, repeatedly:
incrementing the stage identifier for the record to identify a next execution stage among the plurality of execution stages;
storing the record back in the first data structure;
and
repeating processing of the record by retrieving the record from the first data structure and passing the record to the execution stage among the plurality of execution stages that is identified by the stage identifier for the record.

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Dependencies are inferred from the claim text.

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Abstract

A method of annotating a functional definition of a circuit design, the method comprising:

using a physical definition of the circuit design that has been generated from the functional definition, generating a plurality of assignments between a plurality of circuit elements in the circuit design and a plurality of signals defined for the circuit design;
and
automatically modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition;
wherein the plurality of assignments includes a first assignment configured to couple a first circuit element among the plurality of circuit elements to a first signal among the plurality of signals, wherein the first circuit element is defined in a first HDL file among a plurality of HDL files in the functional definition, and wherein modifying the functional definition of the circuit design to incorporate the plurality of assignments into the functional definition includes, for at least the first assignment:
storing a record associated with the first assignment in a first data structure associated with the first HDL file, wherein the first data structure is among a plurality of data structures respectively associated with the plurality of HDL files;
associating a stage identifier with the record in the first data structure, wherein the stage identifier identifies an initial execution stage among a plurality of execution stages;
processing the record by retrieving the record from the first data structure and passing the record to the execution stage among the plurality of execution stages that is identified by the stage identifier for the record;
and
after processing the record, and until the stage identifier for the record indicates that the record has been processed by all of the execution stages, repeatedly:
incrementing the stage identifier for the record to identify a next execution stage among the plurality of execution stages;
storing the record back in the first data structure;
and
repeating processing of the record by retrieving the record from the first data structure and passing the record to the execution stage among the plurality of execution stages that is identified by the stage identifier for the record.

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