System and method for optimizing an integrated circuit design
AssigneeLSI Corporation
InventorsMichael Eneboe, Christopher L. Hamlin
Life of this patent
Estimating the term…
Abstract
The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-programmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.
Claims12
A self-programmable integrated circuit, comprising:
- a processor suitable for performing a program of instructions, the processor accessible via a first interconnect;
- at least two components of the integrated circuit, the components communicatively connected via a second interconnect;
- and
- a memory suitable for storing a program of instructions,
- wherein the program of instructions configures the processor to optimize the physical configuration of the components and the second interconnect of the integrated circuit based on heuristic data indicating past utilization of the components of the integrated circuit, and
- wherein, the heuristic data is optimized based on interconnect channel capacities, scalability of interconnect channel capacities, and isochronous interconnect configuration.
A method for designing an integrated circuit, comprising the steps:
- receiving data specifying a plurality of interconnects and components of a an integrated circuit;
- and
- optimizing a physical configuration of the plurality of interconnects and components of the integrated circuit based on interconnect channel capacities, scalability of interconnect channel capacities and isochronous interconnect configuration.
Dependencies are inferred from the claim text.