Unified placer infrastructure
AssigneeXilinx, Inc.
InventorsJames L. Saunders, Krishnan Anandh, Guenther Stenz, Sudip K. Nag, Jason H. Anderson
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Abstract
Method and apparatus are described for a placer system for placing design objects onto an arrayed architecture, such as a programmable logic device including an FPGA. More particularly, a placer interface is described for communicating with a placer core. The placer interface receives information from external entities, and unifies and generalizes this information for the placer core. The external entities comprise different representations of architecture, design, device, constraints and algorithm-dictated placer-movable objects.
Claims9
A placer system, comprising:
- a memory configured to store a placer core and a placer interface, the placer core including at least one placement algorithm;
- and
- a processor, coupled to the memory, configured to:
- execute the placer interface to generate a generalized representation from external entities at least a portion of which describe a circuit design;
- and
- execute the at least one placement algorithm in the placer core using the generalized representation to generate a placement for the circuit design.
Dependencies are inferred from the claim text.