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US 7,398,440 B2Granted
Tap multiplexer
AssigneeSTMicroelectronics S.r.l.
InventorRobert Warren
Life of this patent
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Abstract
An integrated circuit comprising: a plurality of portions, each portion including test control circuitry; at least one test input arranged to receive test signals; and a multiplexer between the at least one test input and the test control circuitry, the multiplexer having a least one control input whereby the multiplexer is controllable to direct test signals to one of the plurality of portions.
Claims16
An integrated circuit comprising:
- a plurality of portions, each portion including test control circuitry;
- at least one test input pin arranged to receive test signals;
- at least one further input pin;
- and
- a multiplexer between said at least one test input pin and said at least one further input pin, and said test control circuitry, said multiplexer having a least one control input arranged to receive an input from one of said at least one further input pin and said at least one test input pin of said integrated circuit so that the multiplexer is controllable by external test equipment when connected to said integrated circuit to direct test signals from said at least one test input pin to one of said plurality of portions, selected by one of said at least one further input pin and said at least one test input pin.
2 more elements
Dependencies are inferred from the claim text.